Staff CPU Core Verification Engineer – ALU Focus (Equity Eligible)

SiFive, Inc.; Austin (TX); On-site; USD 180,000 - 240,000; Full time

Benefits offered by this job

Healthcare benefits

Retirement plan

Equity

Paid time off

Job summary

SiFive, Inc. is seeking a Staff Design Verification Engineer to lead verification of high‑performance CPU core functionality with emphasis on ALU and integer execution microarchitecture.

This senior IC verification role focuses on out‑of‑order core development, collaborating with architecture, RTL, performance, and verification teams to ensure design intent and robust corner-case coverage. You will own verification planning, drive strategy, and mentor other engineers while advancing reusable DV

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 7+ years of relevant experience in ASIC, CPU/core, or SoC design verification.
• Strong hands-on experience with SystemVerilog-based verification.
• Direct experience with CPU/core verification and CPU microarchitecture.
• Experience verifying ALU pipelines, issue/dispatch, dependency handling, replay and recovery.
• Strong verification methodology knowledge: test planning, stimulus generation, coverage analysis, closure.
• Strong debugging skills and ability to translate architecture intent into verification strategy.
• Familiarity with Python, C/C++ for DV infrastructure and automation.

Responsibilities

• Own verification planning and execution for ALU- and execution-focused CPU core functionality from block to core level.
• Drive verification strategy, test planning, debugging, coverage analysis and closure for complex pipelines.
• Define verification approaches for ALU behaviors, including arithmetic, logical operations, and dependency handling.
• Verify corner-case interactions between ALU execution and core logic including scoreboard and speculative execution.
• Develop and maintain robust verification environments, checkers, scoreboards, and coverage models.
• Collaborate with architecture and design to review specifications and improve verification coverage.
• Mentor engineers through reviews and best practices in verification.

Skills

SystemVerilog

CPU verification

Debugging

DV infrastructure

Python/C/C++

Mentoring

Education

BS/MS in EE/CE/CS

Tools

Verilog/VHDL

Python

C/C++

Job description

SiFive, Inc. is seeking a Staff Design Verification Engineer to lead verification of high‑performance CPU core functionality with emphasis on ALU and integer execution microarchitecture.

This senior IC verification role focuses on out‑of‑order core development, collaborating with architecture, RTL, performance, and verification teams to ensure design intent and robust corner-case coverage. You will own verification planning, drive strategy, and mentor other engineers while advancing reusable DV