Sr. Principal Product Engineer, RTL-GDSII

Cadence Design Systems; Austin (TX); Hybride; USD 120 000 - 180 000; Plein temps

Résumé du poste

Cadence Design Systems in Austin, TX seeks a Product Engineer to drive development of advanced chip design software tools. You will collaborate with R&D, Application Engineering and product marketing to push next‑gen flows and features.

Responsibilities include providing P&R expertise, benchmarking PPA, evaluating feature impact, and liaising between customers, foundries and R&D. Strong scripting and timing/power analysis skills are essential.

Qualifications

• Bachelor's or Master's in EE/CS or equivalent; Masters preferred.
• 10+ years hands-on experience with industry standard P&R tools (7+ with Master).
• Solid understanding of RTL-GDSII flow, PDK, and DK collaterals.
• Strong scripting skills and ability to analyze timing and power.
• Legal eligibility to work in the United States.

Responsabilités

• Provide place-and-route expertise to Cadence customers and internal teams.
• Benchmark PPA on customer and foundry test cases.
• Evaluate impact of new features on PPA.
• Serve as liaison for new features between customer/foundry and R&D.
• Develop point solutions with scripting; perform data mining to identify optimizations.

Connaissances

Place-and-route expertise

Scripting skills

Timing and power analysis

PPA benchmarking

RTL-GDSII flow understanding

Formation

Bachelor's or Master’s in EE/CS

Outils

Place-and-route tools

Description du poste

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This position presents an exciting opportunity within Cadence’s Digital and Signoff Group (DSG) for a Product Engineer. In this dynamic environment, you’ll collaborate closely with R&D, Application Engineering & product marketing teams to help drive the development of advanced chip design software tools.

Responsibilities

• Provide place-and-route expertise to both Cadence customers and internal development teams
• PPA benchmarking on customer and foundry test cases
• Evaluate impact of new features on PPA
• Be a liaison for new features between customer/foundry and R&D development teams
• Develop point solutions with scripting
• Data mining and analysis to uncover PPA limiting issues and identify optimization opportunities

Minimum Qualifications

• A Bachelor or Master’s degree in EE/CS or equivalent major (Masters level preferred)
• A minimum of 10 years of hands on experience with any industry standard place-and-route tools (7 years with Master Degree)
• A good understanding of the RTL-GDSII flow
• A good understanding of the PDK and DK collaterals
• Firm understanding of Timing and power analysis
• Good scripting skills
• Must be legally eligible to work in the US

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Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.