RTL2GDS IC Sr. Principal Design Engineer

Cadence Design Systems

San Jose (CA)

On-site

USD 161,000 - 299,000

Full time

3 days ago
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Benefits offered by this job

Health insurance
401(k) plan with employer match

Job summary

Cadence Design Systems in California seeks an experienced engineer to support customers in digital design implementation and signoff, driving pre-sales and post-sales activities at advanced nodes. You will guide customers on using Cadence tools, conduct product demos, and help optimize flows through scripting and collaboration with R&D.

The role emphasizes strong hands-on experience with Place & Route and Synthesis tools, STA/SDC debugging, and low-power/clock analysis.

Qualifications

  • Requires a BS or MS or PhD in EE.
  • Understands ASIC design implementation process.
  • Strong hands-on experience with Place & Route (Innovus, ICC2, Fusion Compiler).
  • Exposure to Synthesis (Genus, RTL Compiler, Design Compiler).
  • Experience with EDA tools in IC digital implementation & signoff flows (STA tools).
  • Strong STA and SDC debugging abilities are required.
  • Low power analysis, Clock design/analysis and 7/5nm node experience a plus.
  • Automation skills using Perl, Tcl and shell scripting essential.
  • Strong analytical & design abilities in digital implementation.

Responsibilities

  • Provide technical support to Cadence customers in Digital Design Implementation & Signoff (Synthesis, Place & Route, Design Closure, timing/power signoff).
  • Guide customers on Cadence technologies to meet design goals and schedules.
  • Conduct technical presentations and product demonstrations.
  • Drive technical evaluations/benchmarks to success.
  • Collaborate with R&D to enhance tools and methodologies to meet requirements.
  • Drive adoption of Cadence tools and technologies.
  • Augment flows with Tcl and other scripting to improve results.
  • Capture best practices from evaluations to improve efficiency.
  • Provide technical support when building a business case for process improvements.
  • Mentor junior engineers.

Skills

Customer interaction
Presentation skills
Analytical thinking
Fast paced environment

Education

BS/MS/PhD in EE

Tools

Innovus
ICC2
Fusion Compiler
Genus
RTL Compiler
Design Compiler
STA tools
Perl
Tcl
Shell scripting

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The ideal candidate will be energetic, innovative and enthused with how to help customers, solve their toughest Digital Implementation problems using Cadence technology. Will drive Pre-sales and Post–sales activities at advanced nodes for Cadence Digital IC products.

Key Responsibilities
  • Provide technical support to Cadence customers in the areas of Digital Design Implementation & Signoff including Synthesis, Place and Route, Design Closure, and timing/power signoff.
  • Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules.
  • Conduct technical presentations and product demonstrations.
  • Drive technical evaluations/benchmarks to success.
  • Work closely with R&D to enhance the tools and methodologies to meet and exceed customer’s requirements.
  • Drive adoption and proliferation of Cadence tools and technologies.
  • Amend and augment the flow as needed using Tcl and/or other programming skills to meet objectives and improve results/flows.
  • Capture best practices and lessons learned from current evaluations/benchmarks and utilize to improve efficiency and success rate in next engagements.
  • Provide technical support, when developing business case for process improvement projects.
  • Provide mentorship to junior engineers.
Job Requirements
  • Requires a BS or MS or PhD in EE with/or 10-12 years industry related experience in design and EDA (Digital Implementation/Signoff).
  • Understands ASIC Design implementation process and steps.
  • Strong hands‑on experience with Place & Route (Innovus, ICC2, Fusion Compiler).
  • Exposure and experience with Synthesis (Genus, RTL Compiler, Design Compiler).
  • Experience with EDA tools in the IC digital implementation & signoff flows (STA tools).
  • Strong STA and SDC debugging abilities are required.
  • Low power analysis, Clock design/analysis and hands‑on 7/5nm technology node experience a plus.
  • Automation skills using Perl, Tcl and shell scripting essential.
  • Strong analytical & analysis skills covering digital implementation is critical.
  • Proven track record and experience working in a fast paced environment.
  • Excellent customer interaction & presentation skills.

The annual salary range for California is $161,000 to $299,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.

Our benefits programs include:

  • paid vacation and paid holidays
  • 401(k) plan with employer match
  • employee stock purchase plan
  • a variety of medical, dental and vision plan options
  • and more.
Equal Employment Opportunity Policy

Cadence is committed to equal employment opportunity throughout all levels of the organization.

Cadence participates in the E-Verify program in certain U.S. locations as required by law.

Download More Information on E-Verify (64K)

Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For.

Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

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