Sr. DFT Engineer

Prism IT Global; San Jose (CA); On-site; USD 140,000 - 190,000; Full time

Job summary

Prism IT Global is seeking a DFT engineer to design and implement DFT flows for block and SoC level integration. You will work on scan, ATPG, MBIST, and related diagnostics, ensuring robust test coverage and efficient debug processes.

You will verify test patterns through gate-level simulations and collaborate with Synthesis, STA, and physical design teams to resolve DFT issues and optimize test flow. Strong scripting in TCL is required.

Qualifications

• Strong understanding of DFT standards: scan, ATPG, JTAG, MBIST.
• Experience defining DFT specifications and architectures for complex designs.
• Skilled at debugging DFT issues including ATPG patterns and MBIST.
• Experience with vector generation and verification using relevant tools.
• Ability to run silicon debug experiments and analyze data to identify root causes.
• Scripting skills in TCL for automating tasks and custom flows.

Responsibilities

• Design and implement DFT at block and SoC level (scan, MBIST, ATPG, Sims, post-Si diagnosis).
• Verify test patterns via gate-level simulations.
• Collaborate with Synthesis, STA and physical design to debug DFT issues.
• Work with test engineers to bring up test vectors on silicon and ensure testing success.

Skills

DFT concepts

ATPG

MBIST

Scan architecture

JTAG

Scripting TCL

Vector generation

Gate-level simulation

Debugging DFT

Tools

Siemens-Tessent

Synopsys DFT tools

Job description

What You'll Be Doing:

• Design and implement DFT, including scan, MBIST, ATPG, Sims, Post-Si diagnosis at block and SoC level
• Verify test patterns using gate-level simulations.
• Collaborate closely with Synthesis, STA and physical design to debug and resolve DFT related problems.
• Work in partnership with test engineers to bring up test vectors on silicon and ensure successful testing.

What We Are Looking For:

• Strong understanding of industry standards and best practices in DFT - Scan, ATPG, JTAG, and MBIST.
• Proven experience in developing DFT specifications and architectures for complex designs.
• Expertise in debugging DFT issues, including ATPG patterns, MBIST implementations, coverage analysis, and more.
• Proficiency in Siemens-Tessent, Synopsys for DFT implementation, vector generation, and verification.
• Ability to conduct experiments during silicon debug, effectively gather and analyze data to identify root causes.
• Efficient scripting skills using TCL for automating tasks and developing custom flows.