DFT Engineer / DFx Engineer

Intellectt Inc; Santa Clara (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

Intellectt Inc. in Santa Clara, CA seeks a DFT Engineer to lead design and verification of DFT/DFx implementations. You will insert and verify SCAN, SSN, and MBIST, work with MBIST repair, and generate timing/test collateral while advancing IJTAG infrastructure.

Collaboration with RTL, physical design, verification, and test teams is essential. The role requires a BE in a related field and strong experience with Siemens DFT tools and related standards.

Qualifications

• BE / Bachelor's degree in Electrical Engineering, Electronics, Computer Engineering or a related field.

Responsibilities

• Implement and verify DFT features for advanced semiconductor designs.
• Perform SCAN DFT insertion, including SSN (Serial Scan Network).
• Implement and verify MBIST solutions.
• MBIST repair implementation and verification.
• Generate DFT collateral required for test timing and Place & Route (P&R).
• Develop IJTAG (IEEE 1687) infrastructure.
• Work with ICL and PDL specifications.
• Verify DFT features across various design blocks and interfaces.
• Collaborate with RTL, physical design, verification, and test teams to ensure successful DFT implementation and signoff.

Skills

DFT/DFx engineering

Semiconductor test methodology

Education

BE / Bachelor's degree in Electrical Engineering, Electronics, Computer Engineering

Tools

Siemens DFT tools

SCAN

MBIST

IJTAG

IEEE 1687

ICL

PDL

JTAG

Job description

We are seeking a highly skilled DFT Engineer / DFx Engineer to support our client in Santa Clara, CA. The ideal candidate will have strong experience in DFT/DFx implementation and verification, with expertise in Siemens DFT tools, SCAN, MBIST, IJTAG, and related DFT methodologies.

Key Responsibilities:

• Implement and verify DFT features for advanced semiconductor designs.
• Perform SCAN DFT insertion, including SSN (Serial Scan Network).
• Implement and verify MBIST solutions.
• Perform MBIST repair implementation and verification.
• Generate DFT collateral required for test timing and Place & Route (P&R).
• Develop and work with IJTAG (IEEE 1687) infrastructure
• Work with and understand ICL (Instrument Connectivity Language) and PDL (Procedural Description Language) specifications
• Verify DFT features across various design blocks and interfaces
• Collaborate with RTL, physical design, verification, and test teams to ensure successful DFT implementation and signoff

Required Skills:

• BE / Bachelor's degree in Electrical Engineering, Electronics, Computer Engineering, or a related field
• Strong experience in DFT / DFx engineering
• Hands-on familiarity with the Siemens suite of DFT tools
• Experience with SCAN DFT insertion, including SSN
• Experience with MBIST implementation and verification.
• Experience with MBIST repair implementation and verification.
• Experience generating collateral for test timing and Place & Route.
• Strong knowledge of IJTAG / IEEE 1687.
• Good understanding of ICL and PDL.

DFT verification experience with:

• Boundary Scan
• JTAG
• SCAN
• MBIST
• High-Speed I/O
• Preferred Qualifications:
• Experience working on complex SoC/ASIC designs.
• Strong understanding of end-to-end DFT/DFx flows
• Experience with advanced semiconductor test methodologies
• ATPG experience is a plus, but NOT mandatory