DFT Engineer

5 Star Recruitment; Austin (TX); On-site; USD 100,000 - 130,000; Full time

Job summary

A leading recruitment firm is looking for a DFT Engineer in Austin, Texas, with over 5 years of experience. The ideal candidate will implement DFT strategies and architectures, debug designs, and insert DFT logic for SoCs. A Master's degree in Electrical Engineering is required, along with experience in various EDA test tools. The company offers H1-B sponsorship for qualified candidates.

Qualifications

• 5+ years of experience in DFT definition and analysis.
• Experience in IP integration for memories and test controllers.
• Knowledge of ASIC DFT and related verification flows.

Responsibilities

• Implement SoC DFT strategy and architecture.
• Debug design rule checks and apply fixes.
• Insert DFT logic including boundary scan and scan chains.

Skills

DFT specification definition

Silicon bring-up and debug

Fault modeling

Excellent communication skills

Organizational skills

Education

Master's degree in Electrical Engineering

Tools

Design/Fusion Compiler

DFT Max

SpyGlass

Modus

Tessent

TestKompress

Job description

• 5+ Experience in DFT specification definition, architecture, insertion, and analysis in designs
• Experience in silicon bring-up, debug, and validation of DFT features on ATE, debugging ATPG patterns, Compressed ATPG patterns, MBIST, and JTAG-related issues
• Experience in fault modeling

Preferred qualifications

• Master's degree in Electrical Engineering.
• Experience in IP integration (memories, Test controllers, TAP, MBIST).
• Experience using EDA Test tools like Design/Fusion Compiler, DFT Max, SpyGlass, Modus, Tessent, and TestKompress.
• Experience and understanding of ASIC DFT, synthesis, simulation and verification flow.
• Excellent attention to detail organizational, problem-solving, and communication skills.

Responsibilities

• Implement SoC DFT strategy and architecture (ATPG/DFT/MBIST)
• Work on hierarchical design
• Debug all Design Rule checks, apply design fixes to achieve high test quality
• Insert all DFT logic - boundary scan, scan chains, DFT Compression, Logic BIST, TAP controller, Clock Control block, and other DFT IP blocks.
• Insert and hook up MBIST logic.
• Work on test plan for special analog IPs and implement.

Required Citizenship / Work Permit / Visa Status

Will sponsor H1-B

Must-Haves

At least 5 years experience in DFT