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Google is seeking a hardware engineer to deliver SoC Static Timing Analysis and timing signoff for full-chip silicon. You will define timing constraints, drive clock tree jitter, and collaborate with RTL, PD, and software teams to optimize energy, performance and area.
Ideal candidates have 4+ years of STA experience, expertise with PrimeTime/Tempus, and proven silicon delivery. This on-site Mountain View role includes competitive compensation and equity.
Google is seeking a hardware engineer to deliver SoC Static Timing Analysis and timing signoff for full-chip silicon. You will define timing constraints, drive clock tree jitter, and collaborate with RTL, PD, and software teams to optimize energy, performance and area.
Ideal candidates have 4+ years of STA experience, expertise with PrimeTime/Tempus, and proven silicon delivery. This on-site Mountain View role includes competitive compensation and equity.