Senior ASIC Timing & Sign-off Engineer

Google

Sunnyvale (CA)

On-site

USD 163,000 - 236,000

Full time

14 days+
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Job summary

Google is seeking a Static Timing Engineer to join the chip implementation team in Sunnyvale, CA. You will drive full-chip timing sign-off for high-performance ASICs, develop constraints, and automate STA flows using Tcl/Python/Bash, collaborating with architecture, logic design, and DFT teams to ensure robust timing and performance.

The role emphasizes building scalable timing methodologies, reviewing vendor/tool choices, and delivering reliable timing closures for industry-leading hardware

Qualifications

  • Bachelor's degree or equivalent practical experience.
  • 8 years of experience with static timing analysis.
  • Experience in Primetime or Tempus Tcl scripting and static timing analysis debug.
  • Experience in full chip timing sign-off checklist criteria and overseeing final timing sign-off for ASICs.

Responsibilities

  • Perform full chip static timing analysis and timing ECO creation for timing convergence.
  • Debug and resolve STA/design rule issues (unconstrained endpoints, max transitions, min period, min pulse width).
  • Develop timing constraints and verify them for sign-off.
  • Create static timing flow automation scripts using Perl, Python, Tcl, or Bash; own STA flows.

Skills

Static timing analysis
Primetime Tcl scripting
Timing closure

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Master's or PhD in Electrical Engineering, Computer Engineering or Computer Science

Tools

Primetime
Tempus

Job description

Google is seeking a Static Timing Engineer to join the chip implementation team in Sunnyvale, CA. You will drive full-chip timing sign-off for high-performance ASICs, develop constraints, and automate STA flows using Tcl/Python/Bash, collaborating with architecture, logic design, and DFT teams to ensure robust timing and performance.

The role emphasizes building scalable timing methodologies, reviewing vendor/tool choices, and delivering reliable timing closures for industry-leading hardware

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