Static Timing Analysis Engineer, Full-Chip STA

Google Inc.; Mountain View (CA); On-site; USD 138,000 - 197,000; Full time

Benefits offered by this job

Equity awards

Bonus target

Relocation assistance

Job summary

Google Inc. in Mountain View, CA, seeks a Static Timing Analysis Engineer for full-chip STA and timing signoff leadership. You will craft constraints, drive timing closures, and automate checks across complex SoCs to maximize performance and efficiency.

Ideal candidates bring 4+ years in silicon timing closure, proficiency with PrimeTime/Tempus, and scripting skills in Tcl or Perl. Equity and bonus targets accompany a competitive compensation package.

Qualifications

• Bachelor's degree required.
• 4+ years of silicon timing-closure experience.
• Experience with full-chip STA signoff constraints and automation.

Responsibilities

• Deliver SoC STA and timing signoff.
• Define timing signoff corners and derates for signoff.
• Drive clock tree jitter and implementation for SoCs.
• Perform full chip STA and ECO creation and oversee final timing signoff.

Skills

STA expertise

Mentoring

Education

Bachelor's degree in Electrical Engineering or Computer Science

Master's degree in Electrical Engineering or Computer Science

Tools

PrimeTime

Tempus

Tcl

Perl

Job description

Static Timing Analysis Engineer, Full-Chip STA

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• Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
• 4 years of technical experience in silicon timing closure and chip integration.
• Experience in one or more static timing tools (e.g., PrimeTime, Tempus).
• Experience with Static Timing Analysis (STA) signoff constraint authoring for full-chip level, tapeout signoff requirements, checklists, and associated automation.

Mid

Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

corporate_fare Google place Mountain View, CA, USA

Preferred qualifications:

• Master's degree in Electrical Engineering, Computer Science.
• Experience in extraction of design parameters, QoR metrics, and analyzing data trends.
• Experience with ASIC design flows and methodology of static timing analysis.
• Delivery of high-complexity silicon in state-of-the-art technology process nodes.
• Knowledge of semiconductor device physics and transistor characteristics.
• Effective skills with scripting languages such as Tcl or Perl.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $138000 - $197000 (USD) + 15% bonus target + equity + benefits

Learn more about benefits at Google .

• Deliver system-on-chip (SoC) Static Timing Analysis.
• Define SoC timing signoff process corners, derates, uncertainties and their tradeoffs.
• Drive clock tree Jitter and implementation for SoCs to achieve best energy, performance and area.
• Execute full chip timing constraint validation and timing signoff checklist criteria, perform full chip Static Timing Analysis (STA) and timing Engineering Change Order (ECO) creation, and oversee final timing signoff for SoCs.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.