SoC Integration Engineer – CPU/GPU & RTL-to-GDS

Axiom Global Technologies; United States; On-site; USD 120,000 - 160,000; Full time

Job summary

Axiom Global Technologies in the United States seeks a skilled SoC Design Engineer to help integrate CPU and GPU IPs within complex subsystems and ensure efficient communication between blocks.

The role involves RTL-to-GDS design flows, collaboration across architecture, verification, physical design, and software teams, and contributing to basic system-level validation with embedded C.

Qualifications

• Experience integrating ARM Cortex-A or Cortex-R CPUs.
• Experience integrating GPUs, MMUs, and cache-coherent systems.
• Working knowledge of RTL-to-GDS design flows.
• Basic to intermediate understanding of functional verification methodologies, preferably UVM.
• Experience with Synopsys tools such as VCS, Verdi, SpyGlass, Design Compiler, or RTL Architect.
• Basic to intermediate proficiency in C programming for embedded systems.

Responsibilities

• Integrate ARM Cortex-A or Cortex-R CPU subsystems into SoC designs.
• Integrate GPUs, MMUs, and cache-coherent systems.
• Work on cache-coherent systems and integration of interconnects and memory subsystems.
• Support RTL design implementation and RTL-to-GDS flows.
• Collaborate with architecture, verification, physical design, and software teams to resolve integration issues.
• Support design debugging and basic verification activities using industry-standard tools.
• Develop or analyze embedded C code for basic system-level testing and validation.

Skills

Arm Cortex CPUs integration

GPU integration

MMUs integration

Cache-coherent systems

RTL-to-GDS design flows

UVM (functional verification)

C for embedded systems

Tools

VCS

Verdi

SpyGlass

Design Compiler

RTL Architect

Job description

Axiom Global Technologies in the United States seeks a skilled SoC Design Engineer to help integrate CPU and GPU IPs within complex subsystems and ensure efficient communication between blocks.

The role involves RTL-to-GDS design flows, collaboration across architecture, verification, physical design, and software teams, and contributing to basic system-level validation with embedded C.