Senior SOC Design Engineer: RTL, IP Integration

Advanced Micro Devices, Inc.; Boxborough (MA); On-site; USD 120,000 - 180,000; Full time

Job summary

Advanced Micro Devices, Inc. (AMD) seeks an experienced SOC design engineer to own RTL-to-full-chip integration. You will guide IP integration, SOC fabric, timing, and power while collaborating with IP development, verification, and physical design teams across the stack.

You thrive on solving hard problems, leading a domain, and delivering robust silicon from RTL to tape-out. Strong Verilog RTL, SOC experience, and AXI/PCIe knowledge are essential for this role.

Qualifications

• BE/B.Tech/ME/M.Tech or equivalent in ECE/EEE.
• Experience in SOC design and Verilog RTL development.
• Knowledge of system bus protocols (AXI, PCIe).
• Power implementation methodology and UPF understanding.
• Experience with static timing analysis and cross-functional collaboration.

Responsibilities

• Drive SOC-level design and integration.
• Integrate IP, SOC-level fabric, voltage and clock crossings, clocks, resets, fuses, and I/O.
• Develop RTL design and coding for various sections of the SOC and related logic.
• Own SOC power design.
• Perform static verification of the design (RTL, CDC, Power, Connectivity).
• Lead one of the domains listed above.

Skills

Verilog RTL

SOC integration

System bus knowledge

Power/UPF

Static timing analysis

Scripting skills

Education

BE/B.Tech/ME/M.Tech in ECE/EEE

Job description

Advanced Micro Devices, Inc. (AMD) seeks an experienced SOC design engineer to own RTL-to-full-chip integration. You will guide IP integration, SOC fabric, timing, and power while collaborating with IP development, verification, and physical design teams across the stack.

You thrive on solving hard problems, leading a domain, and delivering robust silicon from RTL to tape-out. Strong Verilog RTL, SOC experience, and AXI/PCIe knowledge are essential for this role.