Senior ASIC Verification Engineer – SoC/CPU-GPU IP

TPI Global Solutions; San Jose (CA); On-site; USD 150,000 - 180,000; Full time

Job summary

TPI Global Solutions in San Jose seeks an experienced verification engineer to participate in the functional verification of ASIC/SoC blocks within a CPU/GPU development effort. You will document and execute test plans with directed and constrained-random tests, adapt to evolving industry verification methods, and collaborate across design and verification teams.

Requirements include 10+ years in verification, strong C/C++ in Linux, proficiency with Verilog/SystemVerilog/SystemC, DPI/PLI, and

Qualifications

• 10+ years of proven verification experience on large ASIC projects.
• Strong C/C++ development in Linux environments.
• Expertise with debugging tools such as GDB and Valgrind.
• Proficient in Object Oriented programming, STL, architecture and data structures.
• Knowledge of Perl and Makefiles.
• Experience with Verilog/SystemVerilog/SystemC; DPI/PLI experience preferred.
• Strong analytical skills and attention to detail.
• Excellent written and verbal communication skills.

Responsibilities

• Participate in functional verification of ASIC/SoC blocks for CPU/GPu development.
• Document and execute test plans using directed and constrained-random tests.
• Adopt evolving verification methodologies and contribute to verification infrastructure.
• Collaborate with design and verification teams to understand and verify designs.

Skills

C/C++ development

Linux environment

Debugging with GDB/Valgrind

Object oriented programming

STL

Computer architecture

Perl

Makefiles

Verilog/SystemVerilog/SystemC

DPI/PLI

Analytical skills

Communication skills

Tools

GDB

Valgrind

DPI/PLI tooling

Verilog/SystemVerilog tooling

Job description

TPI Global Solutions in San Jose seeks an experienced verification engineer to participate in the functional verification of ASIC/SoC blocks within a CPU/GPU development effort. You will document and execute test plans with directed and constrained-random tests, adapt to evolving industry verification methods, and collaborate across design and verification teams.

Requirements include 10+ years in verification, strong C/C++ in Linux, proficiency with Verilog/SystemVerilog/SystemC, DPI/PLI, and