Silicon TPM: Lead Energy-Efficient SoC Tapeout & Edge AI

Efficient Computer

Austin (TX)

On-site

USD 200,000 - 240,000

Full time

14 days+

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Job summary

Efficient is seeking a Hardware Technical Program Manager to own the program end-to-end—from architecture freeze through tapeout, bring-up, and production release. You'll work daily with architecture, RTL design, DV/emulation, DFT, physical design, and the foundry/IP vendor ecosystem to drive schedules, surface risks early, and manage critical tradeoffs across teams.

Join Efficient to help shape the future of edge computing with energy-efficient hardware, strong teamwork, and a competitive

Qualifications

B.S. in Electrical/Computer Engineering or equivalent.
7+ years in semiconductor hardware or program management.
Experience leading 2+ SoC/ASIC programs from concept through tapeout and silicon bring-up.
Solid understanding of RTL, verification/coverage, DFT, synthesis, PnR, STA, signoff, GDSII handoff.
Ability to build and defend a bottoms-up schedule with clear dependencies.

Responsibilities

Own the silicon program end-to-end from architecture freeze to production tapeout and bring-up.
Coordinate handoffs across architecture, RTL, DV/emulation, DFT, physical design, IP, package and software.
Run tapeout checklists and signoff matrices, track risks and mitigation options.
Interface with foundry, OSAT, IP, and EDA partners; deliver crisp executive reporting.