Remote TPM for SoC & Chiplet Programs

TylSemi, Inc.

San Jose (CA)

Hybrid

USD 180,000 - 240,000

Full time

2 days ago
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Job summary

TylSemi, Inc. in San Jose, CA is seeking a Technical Program Manager to oversee SoC program execution from architecture alignment to tape-out and delivery.

You will coordinate across RTL, DV, physical design, and validation teams with leading ecosystem partners. The role requires deep program management experience in semiconductor environments, strong communication skills, and the ability to drive risk mitigations while maintaining aggressive schedules.

Qualifications

  • 15+ years of technical program or project management experience in semiconductor, custom silicon, or chiplet/advanced packaging environments.
  • Experience interfacing with ecosystem partners — chip development schedules, interdependencies on EDA and IP, tape-out schedules and silicon bring-up timelines
  • Familiarity with silicon fabrication, advanced packaging formats: CoWoS, InFO, 2.5D/3D integration, substrate/interposer-based assembly
  • Technical fluency in SoC or chiplet design flows — enough to understand RTL milestones, DV sign-off, PD handoffs, and silicon bring-up phases
  • Strong communication skills — comfortable presenting program status and risk posture to internal and external stakeholders
  • Proficiency with program tracking tools; building program infrastructure from scratch is a plus
  • Familiarity with key connectivity IPs UCIe, PCI

Responsibilities

  • Manage all active customer engagements end-to-end: from architectural spec alignment through tape-out, KGD testing, packaging, and volume shipment milestones
  • Ensure alignment with ecosystem partners — including foundries, OSAT/packaging houses, EDA vendors (Synopsys, Cadence), and IP partners
  • Translate customer requirements (silicon architecture, interface specs, package form factor, delivery schedules) into internal program plans with clear owners and dates
  • Build and maintain program trackers, risk registers, and executive dashboards covering each engagement
  • Drive gate reviews and weekly program syncs across internal RTL/DV, physical design, and validation teams
  • Manage internal and external scoping and delivery timelines in coordination with technical and business teams
  • Identify and escape risks early; propose and implement mitigations before they become schedule threats

Skills

Program management
Semiconductor industry
Chiplet/advanced packaging
RTL/DV understanding
Stakeholder communication

Tools

Synopsys
Cadence

Job description

TylSemi, Inc. in San Jose, CA is seeking a Technical Program Manager to oversee SoC program execution from architecture alignment to tape-out and delivery.

You will coordinate across RTL, DV, physical design, and validation teams with leading ecosystem partners. The role requires deep program management experience in semiconductor environments, strong communication skills, and the ability to drive risk mitigations while maintaining aggressive schedules.

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