SerDes Systems Validation Engineer (Mixed‑Signal)

Apple; Culver City (CA); On-site; USD 123,000 - 214,000; Full time

Benefits offered by this job

Stock programs

Employee Stock Purchase Plan

Medical and dental coverage

Retirement benefits

Job summary

Apple is seeking a SerDes Design and Validation Engineer to lead system validation of high‑speed SerDes IP in Culver City, CA. The role focuses on analog/mixed-signal circuit blocks, DFT techniques, and robust IP validation across lab and production environments.

You will drive test plans, analyze data, and collaborate with ASIC teams to ensure first‑time silicon success while leveraging AMS design, layout supervision, and lab benchmarking to maximize performance and power efficiency.

Qualifications

• Minimum requirement of a bachelor's degree.

Responsibilities

• Ownership of SerDes system bring-up, validation and debug.
• Collaborate with design teams to define DFT needs for testability and silicon success.
• Involve in mixed-signal verification to understand SerDes operation and interaction with control logic.

Skills

SerDes design

Analog/Mixed-signal

DFT/testability

Lab testing

Scripting/automation

Production testing

PCIe/USB/DP/MPHY

CMOS/ASIC knowledge

Education

Bachelor's degree

Tools

Lab testing equipment

ATE/test equipment

Job description

Apple is seeking a SerDes Design and Validation Engineer to lead system validation of high‑speed SerDes IP in Culver City, CA. The role focuses on analog/mixed-signal circuit blocks, DFT techniques, and robust IP validation across lab and production environments.

You will drive test plans, analyze data, and collaborate with ASIC teams to ensure first‑time silicon success while leveraging AMS design, layout supervision, and lab benchmarking to maximize performance and power efficiency.