High-Speed SerDes Circuit Design Engineer

Apple Inc.

Beaverton (OR)

On-site

USD 140,000 - 210,000

Full time

14 days+
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Job summary

Apple Inc. seeks talented Analog Mixed-Signal designers to join the SerDes team.

You will work on high-speed AMS circuits for IPs across Apple SOCs, collaborating with architecture, SIPI, packaging, and board teams to define block-level specs and drive transistor-level implementations. You will contribute to data-path optimization, layout supervision, and post-silicon validation, while leveraging tools like SystemVerilog, Matlab, Python and VerilogAMS to model and verify designs.

Qualifications

  • Bachelor's degree in a relevant field or equivalent
  • Deep knowledge of analog/mixed-signal design for high-speed SerDes
  • Experience with layout supervision and IP delivery
  • Familiarity with lab measurement techniques and characterization
  • Proficiency in SystemVerilog, Matlab, Python or VerilogAMS
  • Understanding of PCIe/USB/DP MPHY SerDes protocols

Responsibilities

  • Develop high-performance AMS circuits for SerDes PHY
  • Evaluate optimal circuit topologies for Rx/Tx blocks and clocking
  • Collaborate with cross-functional teams to define IP specifications and implement transistor-level designs
  • Drive mask design, layout supervision, and verification to meet quality standards
  • Assist SOC teams to deliver IP views and drive performance analysis

Skills

Analog mixed-signal design
High-speed SerDes
CMOS FinFET technologies
Transistor-level implementation
Circuit modeling
Lab testing
Digital design basics
Layout supervision
CDR architectures
PPA optimization
Scripting/automation
SerDes protocols knowledge

Education

Bachelor's degree

Tools

SystemVerilog
Matlab
Python
VerilogAMS

Job description

Apple Inc. seeks talented Analog Mixed-Signal designers to join the SerDes team.

You will work on high-speed AMS circuits for IPs across Apple SOCs, collaborating with architecture, SIPI, packaging, and board teams to define block-level specs and drive transistor-level implementations. You will contribute to data-path optimization, layout supervision, and post-silicon validation, while leveraging tools like SystemVerilog, Matlab, Python and VerilogAMS to model and verify designs.

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