Senior SerDes & Silicon Validation Engineer

Apple Inc.; San Diego (CA); On-site; USD 175,000 - 308,500; Full time

Job summary

Apple Inc. is seeking an Analog Mixed Signal IP Silicon Validation Engineer to lead lab characterization and validation of high-speed SerDes blocks. You will work with multi-functional teams to launch premiere mobile SoCs, contributing to products enjoyed by millions of Apple customers daily.

The role requires hands-on SerDes experience, probes into CTLE/DFE/FFE/CDR/PLLs, and strong debugging skills. A path to impact within a dynamic team awaits.

Qualifications

• BSEE and 7+ years related industry experience.
• Hands-on SerDes experience with NRZ and PAM architectures.
• Familiarity with SerDes blocks (CTLE/DFE/FFE/CDR/PLLs) and debugging.
• Experience with high-speed protocols (USB, PCIe, DP).
• Python programming experience (preferred).

Responsibilities

• Lead up, validate, and characterize high-speed SerDes blocks.
• Collaborate with cross-functional teams to validate and launch SoCs.
• Characterize SerDes blocks and debugging processes.
• Develop test methodologies to evaluate SerDes margins across PVT.
• Support ATE and Product Engineering.

Skills

SerDes architectures

Test & measurement

Python

Education

BSEE

MSEE

Tools

Oscilloscopes

BERTs

Job description

Apple Inc. is seeking an Analog Mixed Signal IP Silicon Validation Engineer to lead lab characterization and validation of high-speed SerDes blocks. You will work with multi-functional teams to launch premiere mobile SoCs, contributing to products enjoyed by millions of Apple customers daily.

The role requires hands-on SerDes experience, probes into CTLE/DFE/FFE/CDR/PLLs, and strong debugging skills. A path to impact within a dynamic team awaits.