Senior SerDes System Validation Engineer | Bring-up & Debug

Apple Inc.; Cupertino (CA); On-site; USD 184,700 - 324,800; Full time

Benefits offered by this job

Medical coverage

Employee stock plan

Relocation assistance

Job summary

Apple Inc. is seeking a SerDes System Validation Engineer in Cupertino to lead bring-up, validation, and debug of high-speed SerDes IP within the Analog-Mixed/Signal design team.

You will validate embedded circuits, analyze robustness, and work with cross-functional teams to ensure first-time silicon success. The role requires deep expertise in SerDesProtocols, mixed-signal verification, and scripting for automation.

Qualifications

• BS with 10+ years relevant industry experience
• Strong knowledge of high-speed SerDes protocols (PCIe, USB, UCIe, OIF)
• Experience with system bring-up of high-speed serial links and lab testing
• Knowledge of DFT to aid in validation
• Experience leading mixed-signal SerDes system validation

Responsibilities

• Ownership of SerDes system bring-up, validation and debug
• Be involved in mixed-signal verification tasks to understand SerDes operation
• Work with design teams to understand the architecture and define DFT needs
• Collaborate with multiple teams to enable high-quality silicon for Apple products

Skills

SerDes protocols

Scripting

Mixed-signal verification

System bring-up

Python

C

Matlab

DFT knowledge

PCB design

Communication skills

Education

Bachelor's degree in Electrical Engineering

Tools

Lab testing equipment

Job description

Apple Inc. is seeking a SerDes System Validation Engineer in Cupertino to lead bring-up, validation, and debug of high-speed SerDes IP within the Analog-Mixed/Signal design team.

You will validate embedded circuits, analyze robustness, and work with cross-functional teams to ensure first-time silicon success. The role requires deep expertise in SerDesProtocols, mixed-signal verification, and scripting for automation.