Senior Wireless MAC/RTL Verification Engineer

Apple; San Diego (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Apple is seeking a Wireless Design Verification Engineer in San Diego to lead pre-silicon RTL verification of wireless MAC and interfaces within a premier wireless SoC team. You will work with DV methodologists, designers, and systems engineers to build reusable test benches and metric-driven verification methodologies.

The role requires a BS with 10+ years of industry experience, deep knowledge of Verilog/SystemVerilog and UVM, and hands-on ASIC verification experience.

Qualifications

• BS and a minimum of 10 years relevant industry experience.
• Advanced knowledge of Verilog, SystemVerilog, UVM, and SystemVerilog Assertion.
• Knowledge and experience of ASIC verification flows including test bench development, constrained random testing, and code/functional coverage.
• Verification experience of MAC, PHY, DMA, timer, AMBA bus and fabric, encryption/decryption engine.

Responsibilities

• Pre-silicon RTL verification of wireless MAC and its interfaces with the rest of the wireless SoC.
• Collaborate with DV methodologists, designers, and communication systems engineers to develop reusable test benches and verification environments.

Skills

Verilog

SystemVerilog

UVM

SystemVerilog Assertions

Python scripting

Tools

Palladium/FPGA validation

Constrained random testing

Code coverage

Job description

Apple is seeking a Wireless Design Verification Engineer in San Diego to lead pre-silicon RTL verification of wireless MAC and interfaces within a premier wireless SoC team. You will work with DV methodologists, designers, and systems engineers to build reusable test benches and metric-driven verification methodologies.

The role requires a BS with 10+ years of industry experience, deep knowledge of Verilog/SystemVerilog and UVM, and hands-on ASIC verification experience.