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Hewlett Packard Enterprise is seeking an experienced Senior VLSI ASIC Logic Design Engineer in Colorado to drive complex chip design efforts. The role is hybrid, with an expectation to work about 2 days per week from an HPE office, collaborating with global teams on architecture, verification, and prototype development.
You will lead VLSI engineers, review designs, mentor staff, and push for innovative integration of new technologies across projects, contributing to high-quality, reliable ASIC
Hewlett Packard Enterprise is seeking an experienced Senior VLSI ASIC Logic Design Engineer in Colorado to drive complex chip design efforts. The role is hybrid, with an expectation to work about 2 days per week from an HPE office, collaborating with global teams on architecture, verification, and prototype development.
You will lead VLSI engineers, review designs, mentor staff, and push for innovative integration of new technologies across projects, contributing to high-quality, reliable ASIC