Senior VLSI Physical Design Lead (Hybrid)

HITEC; Colorado; Hybrid; USD 168,000 - 319,000; Full time

Job summary

Hewlett Packard Enterprise in Colorado seeks a VLSI Physical Design Lead Engineer to drive architecture, timing closure and methodology across multi‑platform ASIC implementations. You will mentor teams, influence design choices and work with industry-standard EDA tools to deliver high‑performance chips.

Join a hybrid role with opportunities to define scalable design flows, champion hardware innovations, and lead cross‑functional collaboration while advancing VLSI excellence.

Qualifications

• Bachelor's, Master's or PhD in Electrical or Computer Engineering.
• Typically 10+ years experience.

Responsibilities

• Develops organization-wide architectures and methodologies for VLSI design and development across multiple platforms and organizations within the Global Business Unit.
• Recognized as an authority in key VLSI technical areas, Plays a crucial role in defining industry standards, developing product features that become accepted as de-facto industry standards
• Reviews and evaluates VLSI designs and project activities for compliance with technology and development guidelines and standards; Contributes towards decisions which have major technical impact on strategic directions and cost efficiency of the unit.
• Provides technical leadership and accountability for multiple project teams and engineers. Leverages recognized VLSI expertise, business acumen, and experience to influence decisions of executive business leadership, outsourced development partners, and industry standards groups.
• Provides guidance and mentoring to less experienced staff members to set multiple examples, over time, of VLSI design and development innovation and excellence.
• Participates in and provides input on process for selection of future technical leaders.
• Identifies emerging VLSI technologies and analyses their impact. Is instrumental in identifying new VLSI projects and programs.

Skills

Leadership experience

VLSI principles

Digital logic

Computer architecture

Executive communication

HDL/FPGA tools

Education

Bachelor's/Master's/PhD in Electrical or Computer Engineering

Tools

Synopsys Fusion Compiler

Design Compiler

PrimeTime

Formality

Cadence RTL Compiler

Genus

LEC

Job description

Hewlett Packard Enterprise in Colorado seeks a VLSI Physical Design Lead Engineer to drive architecture, timing closure and methodology across multi‑platform ASIC implementations. You will mentor teams, influence design choices and work with industry-standard EDA tools to deliver high‑performance chips.

Join a hybrid role with opportunities to define scalable design flows, champion hardware innovations, and lead cross‑functional collaboration while advancing VLSI excellence.