Senior VLSI Tools & Methodology Engineer - Hybrid

HITEC; Fort Collins (CO); Hybrid; USD 147,000 - 279,000; Full time

Job summary

Hewlett Packard Enterprise in Colorado is seeking a Senior VLSI Tools and Methodology Engineer. The role is hybrid, requiring on-site work about two days per week to coordinate with teams and partners on VLSI design and verification efforts.

Responsibilities include leading VLSI projects, developing tools and flows for EDA toolchains (Synopsys, Cadence, Siemens), mentoring engineers, and driving innovation.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering or Computer Engineering.
• 10+ years of experience in VLSI design, verification, or implementation.
• Expert level proficiency in VLSI fundamentals, digital logic, and computer architecture.
• Experience with large-scale ASIC design environments and EDA toolchains.
• Strong communication in English and local language; patents/publications are a plus.

Responsibilities

• Provide technical expertise and lead project teams of Electronic and VLSI engineers and partners through all stages of design.
• Review and evaluate designs for compliance with VLSI guidelines; provide feedback to improve quality.
• Provide VLSI-specific and architectural leadership to cross-organizational projects and programs.
• Develop custom tools, flows and methodologies to support deployment of industry-standard EDA tools (Synopsys, Cadence, Siemens).
• Develop standardized environments based on revision control systems (git, Perforce, Subversion).
• Provide leadership to the project team to deliver reliable, cost-effective VLSI prototypes and products.
• Mentor less experienced staff to promote innovation and excellence in design.
• Participate in process for selecting future technical leaders.
• Drive VLSI innovation and integration of new technologies in the design organization.

Skills

VLSI design principles

Digital logic

Computer architecture

System Verilog

Analytical thinking

Project leadership

Communication skills

Education

Bachelor's or Master's degree in Electrical Engineering or Computer Engineering

Tools

Synopsys

Cadence

Siemens

Git

Perforce

Subversion

Job description

Hewlett Packard Enterprise in Colorado is seeking a Senior VLSI Tools and Methodology Engineer. The role is hybrid, requiring on-site work about two days per week to coordinate with teams and partners on VLSI design and verification efforts.

Responsibilities include leading VLSI projects, developing tools and flows for EDA toolchains (Synopsys, Cadence, Siemens), mentoring engineers, and driving innovation.