Senior Verification Architect – UVM/ASIC/SoC (Equity + Bonus)

Hibob Inc.; Pittsburgh (Allegheny County); On-site; USD 92,000 - 154,000; Full time

Benefits offered by this job

Discretionary bonus

Equity

Medical benefits

Job summary

Credo is seeking a hands-on verification engineer to contribute to digital design verification for our high-performance networking and interface IP portfolio. You will help architect scalable, reusable verification environments and support UVM testbench development.

Responsibilities include verification plans, coverage goals, and partnering with design and architecture teams to deliver production-ready silicon, with a base salary range of $92,000 to $154,000 and eligibility for discretionary

Qualifications

• Basic Qualifications: Bachelor’s or master's degree in electrical and/or computer engineering.
• Technical leadership in ASIC/SoC verification methodology and execution.
• Strong understanding of digital design concepts (state machines, data paths, FIFOs, CDCs, resets, low-power, performance).
• Expertise in SystemVerilog, UVM, constrained-random verification, assertion-based verification, and development of simulable/behavioral models with configurability and reuse.
• Strong automation and scripting skills in Python, Perl, Tcl, and shell for regressions, reporting, stimulus, and workflow optimization.
• Advanced debugging skills across RTL, testbench, waveforms, assertions, and regression failures.
• Networking protocols: 802.3, PCIe, CXL, and related standards.
• On-chip bus/interconnect: AMBA CHI, AXI, APB, etc.
• Forward Error Correction (FEC) algorithms.
• Experience with Cadence, Mentor, or Synopsys tool suites for simulation, lint, and synthesis.
• Knowledge of AI workloads is a plus.

Responsibilities

• Define end-to-end verification strategy and architect reusable, scalable UVM-based testbench frameworks for IP and subsystem verification.
• Translate architecture and functional specifications into verification plans, test scenarios, checkers, assertions, and coverage models.
• Lead development of reusable UVM verification components including agents, drivers, monitors, scoreboards, reference models, and constrained-random stimulus.
• Own regression planning and execution, failure triage, debug, root-cause analysis, and verification sign-off criteria.
• Drive functional and code coverage closure, identify verification gaps, and improve methodology for quality and efficiency.
• Partner with design, architecture, firmware, emulation, and post-silicon teams to ensure robust verification of complex data-path and protocol-centric designs.
• Review microarchitecture for testability and observability, and influence design decisions to improve verification efficiency.
• Develop automation and scripting infrastructure to improve regressions, reporting, stimulus generation, and verification productivity.
• Lead design and verification reviews, establish best practices, and mentor engineers on methodology and debugging techniques.
• Support critical product and field issues requiring deep insight into architecture, RTL behavior, and verification environment behavior.
• Ensure compliance with relevant standards and specifications.
• Evaluate AI-driven verification techniques and streamline methodologies around AI-enhanced solutions.

Skills

SystemVerilog

UVM

constrained-random verification

assertion-based verification

synthesizable models

Python scripting

debug RTL

PCIe protocols

AMBA CHI AXI

FEC algorithms

Education

Bachelor’s or master’s degree in electrical/computer engineering

Tools

Cadence

Mentor

Synopsys

Job description

Credo is seeking a hands-on verification engineer to contribute to digital design verification for our high-performance networking and interface IP portfolio. You will help architect scalable, reusable verification environments and support UVM testbench development.

Responsibilities include verification plans, coverage goals, and partnering with design and architecture teams to deliver production-ready silicon, with a base salary range of $92,000 to $154,000 and eligibility for discretionary