Design Verification Engineer

Sintegra Inc.; Sunnyvale (CA); On-site; USD 119,800 - 258,000; Full time

Job summary

A technology company located in Mountain View, CA is seeking a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP. The role involves collaboration with design and architecture teams to verify complex digital systems. The ideal candidate will have over 5 years of SoC Design Verification experience and strong skills in SystemVerilog and UVM. This position offers a full-time employment opportunity with a salary range between $119,800 and $258,000.

Qualifications

• 5+ years of SoC Design Verification experience.

Responsibilities

• Develop and execute SoC and IP-level verification using SystemVerilog and UVM.
• Verify UCIe, Ethernet MAC & PCS, and PCIe designs.
• Support PCIe Root of Trust verification, including Rambus IP.
• Create verification plans, tests, assertions, and coverage.
• Debug issues and drive verification closure.

Skills

SoC Design Verification

SystemVerilog

UVM

Debugging

Education

BS/MS in EE, CE, or related field

Job description

We are looking for a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP. This role involves close collaboration with design and architecture teams to verify complex digital systems.

Responsibilities

• Develop and execute SoC and IP-level verification using SystemVerilog and UVM
• Verify UCIe, Ethernet MAC & PCS, and PCIe designs
• Support PCIe Root of Trust verification, including Rambus IP
• Create verification plans, tests, assertions, and coverage
• Debug issues and drive verification closure

Requirements

• BS/MS in EE, CE, or related field
• 5+ years of SoC Design Verification experience

Seniority Level

Mid-Senior level

Employment Type

Full-time

Industry

Semiconductor Manufacturing

Location

Mountain View, CA

Salary

$119,800.00 – $258,000.00