Senior Verification Architect – FPGA/SoC AI-Driven

Maxonic Inc.; Chandler (AZ); Hybrid; USD 180,000 - 240,000; Full time

Job summary

Maxonic Inc. is seeking a Technical Staff Engineer – Verification in Chandler, AZ (onsite/hybrid) to lead verification of next-generation FPGA products.

You will develop reusable UVM testbenches, drive constrained-random and formal verification, and collaborate with arch/design, emulation, and hardware prototyping teams to ensure first-silicon success. The role demands 12+ years in SoC verification and strong SystemVerilog/UVM skills.

Qualifications

• 12+ years in functional verification of complex SoC designs.
• Expertise in SystemVerilog, UVM, formal verification.
• Proven experience in methodology development and tool automation.
• Familiarity with AI/ML-driven EDA tools and scripting for flow integration.
• Good understanding of SoC architectures – ARM/RISC-V.
• Expertise in at least two of the listed domains/peripherals.
• Exposure to emulation, hardware prototyping and post-silicon debug.
• Experience with FPGA-based acceleration platforms and simulation/emulation flows.

Responsibilities

• Verification of complex subsystems and SoC using an optimal mix of constrained random, formal and C-based verification methods.
• Develop and maintain reusable UVM-based test benches and verification environments.
• Involve in RTL, power aware and gate level verification.
• Contribute to quality through AI/ML-enabled verification methodologies.
• Collaborate with emulation and hardware prototyping teams to define a unified verification methodology.
• Collaborate with architecture and design teams to ensure seamless execution and first-silicon success.
• Mentor junior team members.

Skills

SystemVerilog

UVM

Formal verification

AI/ML-driven EDA tools

ARM/RISC-V

Verification methodologies

Tool automation

Python scripting

Emulation

Hardware prototyping

Post-silicon debug

FPGA architecture

Education

BS/MS in Electrical/Electronic Engineering

Tools

Cadence/Synopsys verification suites

Git

Perforce

SVN

Job description

Maxonic Inc. is seeking a Technical Staff Engineer – Verification in Chandler, AZ (onsite/hybrid) to lead verification of next-generation FPGA products.

You will develop reusable UVM testbenches, drive constrained-random and formal verification, and collaborate with arch/design, emulation, and hardware prototyping teams to ensure first-silicon success. The role demands 12+ years in SoC verification and strong SystemVerilog/UVM skills.