Senior UCIe Post-Silicon Validation Lead

Synopsys, Inc.; Hillsboro (OR); On-site; USD 140,000 - 190,000; Full time

Job summary

Synopsys, Inc. in Hillsboro, Oregon, seeks an experienced engineer to own the post-silicon validation and characterization strategy for UCIe die-to-die interface IP.

You will define test plans, determine passes, and drive silicon sign-off, partnering with hardware and software teams to ensure robust, scalable validation. The role emphasizes building lab automation frameworks in Python and C/C++, delivering data-rich results to customers, mentoring engineers, and shaping the technical direction

Qualifications

• Bachelor's degree in Electrical Engineering or Computer Engineering; 8+ years experience, or Master's with 6+ years.
• Hands-on post-silicon validation and debug of high-speed mixed-signal IP; UCIe experience preferred; SerDes exposure.
• Knowledge of the UCIe specification, including PHY and D2D adapter layers, initialization and training.
• Advanced software development across Python, C, and C++, with GitLab, Jira, Confluence familiarity a plus.
• Experience architecting lab automation frameworks and Python UI development.
• Expert-level debugging with high-speed oscilloscopes, BERTs, spectrum analyzers, and network analyzers.
• Experience supporting customer silicon bring-up in a lab environment and communicating findings.

Responsibilities

• Own post-silicon validation strategy for UCIe die-to-die IP from plan to sign-off.
• Architect and develop software for lab automation, result processing, and silicon debug, spanning Python, C, and C++.
• Lead complex debug across circuit design, package and interposer channel behavior, link training firmware, and protocol layer interactions.
• Support customers with bring-up and debug in on-site labs and remote correlation sessions.
• Develop characterization methodology for die-to-die links using on-die instrumentation and traditional lab equipment.
• Design UIs and data tools for customer evaluations, marketing demos, and internal reporting.
• Review work and mentor junior/mid-level engineers; establish measurement and correlation methodologies.

Skills

Python

C++

Lab automation

UI development

Education

Bachelor's degree in Electrical Engineering or Computer Engineering

Master's degree in Electrical Engineering or Computer Engineering

Tools

GitLab

Jira

Confluence

Oscilloscopes

BERTs

Spectrum analyzers

Job description

Synopsys, Inc. in Hillsboro, Oregon, seeks an experienced engineer to own the post-silicon validation and characterization strategy for UCIe die-to-die interface IP.

You will define test plans, determine passes, and drive silicon sign-off, partnering with hardware and software teams to ensure robust, scalable validation. The role emphasizes building lab automation frameworks in Python and C/C++, delivering data-rich results to customers, mentoring engineers, and shaping the technical direction