Senior UCIe PHY Engineer for ML Silicon & Data Center

Amazon; Austin (TX); On-site; USD 159,200 - 215,300; Full time

Job summary

Annapurna Labs, an AWS UC organization, seeks a senior UCIe engineer to help define, design, validate, and operate AWS’s next‑generation ML silicon and servers.

You will collaborate with architects, design teams, and software engineers on UCIe, SERDES, and high‑speed analog technologies, leading debug and post‑silicon bring‑up in data-center environments.

The role emphasizes hands-on testing, scripting, and data‑driven improvements to reliability and performance in EC2 scale deployments.

Qualifications

• Bachelor’s degree in Electrical/Computer/Systems Engineering or related field.
• 7+ years of silicon development experience.
• 3+ years of SOC/IO/sub-systems work with physical design teams to optimize ASICs.
• Strong understanding of UCIe at PHY and controller levels.
• Knowledge of UCIe timing parameters and controller features.
• Ability to create scripts (Lua, Bash, Python) for day-to-day tasks.
• Leadership in post-silicon bring-up of UCIe-Advanced or Standard.
• System-level debug and root-cause analysis across bring-up and production phases.

Responsibilities

• Collaborate with architects, design teams, and software engineers on next-generation ML chips.
• Support ongoing debug and operations of previous ML chips in manufacturing and data centers.
• Dive deep into IP integration, packaging, silicon bring-up, characterization, and validation of UCIe subsystems.
• Independently develop scripts as needed and collaborate with software engineers to scale solutions.

Skills

UCIe PHY expertise

Scripting capabilities

System-level debugging

Cross-functional leadership

Post-silicon bring-up leadership

Education

Bachelor's degree in Electrical/Computer/Systems Engineering

MS degree in computer science or electrical engineering

Tools

Lua

Bash

Python

Job description

Annapurna Labs, an AWS UC organization, seeks a senior UCIe engineer to help define, design, validate, and operate AWS’s next‑generation ML silicon and servers.

You will collaborate with architects, design teams, and software engineers on UCIe, SERDES, and high‑speed analog technologies, leading debug and post‑silicon bring‑up in data-center environments.

The role emphasizes hands-on testing, scripting, and data‑driven improvements to reliability and performance in EC2 scale deployments.