Senior ML Acceleration Hardware Engineer — PCIe/SerDes

Amazon; Cupertino (CA); On-site; USD 143,300 - 247,600; Full time

Job summary

Amazon’s Annapurna Labs unit seeks a Sr. Hardware Engineer to define, design, and validate next‑gen AWS ML chips, cards, and server integration for datacenter use. You will lead PCIe, SerDes, and high‑speed interfaces to deliver top performance and cost efficiency.

Responsibilities include hardware design validation, test development, and cross‑functional collaboration with software teams to implement diagnostics and validation processes.

Qualifications

• Deep knowledge of PCIe Gen4 or above, electrical and functional at chip and PCB levels.
• Deep understanding of transmission line theory and electromagnetics, for SerDes and interfaces.
• Experience working with ODMs, IP silicon vendors, and suppliers on triaging and debugging.
• Hands‑on lab equipment skills (VNA, real‑time scope, sampling scope) for validation.
• Automation scripting skills for test execution, log parsing, and data collection.
• Strong technical communication skills to interface with cross‑functional leads.

Responsibilities

• Design and validate hardware for AWS ML chips and server integration.
• Lead PCIe and SerDes design and integration efforts.
• Shape and optimize high‑speed interface design and signal integrity.
• Drive test development, automation, and data collection.
• Collaborate with software and hardware teams to define diagnostics and validation processes.

Skills

PCIe Gen4 expertise

Transmission line theory

ODM / silicon vendor coordination

Lab equipment for validation

Automation scripting for tests

Technical communication

Job description

Amazon’s Annapurna Labs unit seeks a Sr. Hardware Engineer to define, design, and validate next‑gen AWS ML chips, cards, and server integration for datacenter use. You will lead PCIe, SerDes, and high‑speed interfaces to deliver top performance and cost efficiency.

Responsibilities include hardware design validation, test development, and cross‑functional collaboration with software teams to implement diagnostics and validation processes.