Lead Hardware Design Engineer, ML Acceleration

Amazon Web Services (AWS); Cupertino (CA); On-site; USD 157,000 - 213,000; Full time

Job summary

Annapurna Labs (U.S.) Inc. within AWS UC is seeking a Hardware Design Engineer to define, design and validate next generation ML chips, cards and server integration.

You will lead PCIe and Serdes topics to create customized platforms for AWS datacenters. You will contribute to the design and optimization of hardware across data center deployments, applying new technologies to scale and improve performance, quality and cost.

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• Experience identifying bugs in architecture, algorithms, functionality, and performance.
• Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing.
• Master's degree preferred in Electrical/Communications Engineering.
• Experience with ARM and DSP ISAs; RF standards knowledge helpful.
• Experience with Python or Perl for automation.

Responsibilities

• Define, design and validate hardware for AWS ML chips, cards and server integration.
• Lead PCIe and Serdes topics for scalable datacenter platforms.
• Drive optimization for performance, quality and cost in large-scale server deployments.

Skills

Bug identification

Multi-level debugging

System verification

Education

Bachelor's degree in Electrical Engineering

Master's in Electrical/Communications Engineering

Tools

ARM ISA

DSP ISAs

Python/Perl automation

Job description

Annapurna Labs (U.S.) Inc. within AWS UC is seeking a Hardware Design Engineer to define, design and validate next generation ML chips, cards and server integration.

You will lead PCIe and Serdes topics to create customized platforms for AWS datacenters. You will contribute to the design and optimization of hardware across data center deployments, applying new technologies to scale and improve performance, quality and cost.