Senior ML Acceleration Hardware Engineer

Amazon Web Services (AWS); Austin (TX); On-site; USD 136,000 - 184,000; Full time

Job summary

Annapurna Labs (U.S.) Inc. is seeking a Hardware Design Engineer to define, design and validate AWS next generation ML chips, cards and server integrations in AWS datacenters.

As a senior member of the hardware team, you will lead PCIe and Serdes topics, drive platform customization to fit within AWS datacenter technology, and push performance, quality and cost improvements. Strong debugging and verification across IP blocks to SoCs, plus RF/5G/IEEE standards experience, are highly valued for

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• Experience identifying bugs in architecture, algorithms, functionality, and performance with debugging skills.
• Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing.
• Master's degree in Electrical or Communications Engineering or related field.
• Experience with formal verification techniques including abstraction and end-to-end checking.
• Experience with ARM and various DSP ISAs.
• Experience with RF standards (4G/5G NR, WiMAX, 802.11ad, etc.).
• Experience with Python or Perl for automation.

Responsibilities

• Define, design and validate AWS next generation ML Chips, Cards and server integration.
• Lead PCIe and Serdes topics to create customized platforms for AWS datacenters.
• Improve product performance, quality and cost in a fast-paced environment.

Skills

Bachelor's degree

Bug identification

Multi-level verification

Python

Perl

ARM ISA

DSP ISA

RF standards knowledge

Education

Bachelor's degree in Electrical Engineering or related field

Master's degree in Electrical or Communications Engineering or related field

Tools

Formal verification tools

Job description

Annapurna Labs (U.S.) Inc. is seeking a Hardware Design Engineer to define, design and validate AWS next generation ML chips, cards and server integrations in AWS datacenters.

As a senior member of the hardware team, you will lead PCIe and Serdes topics, drive platform customization to fit within AWS datacenter technology, and push performance, quality and cost improvements. Strong debugging and verification across IP blocks to SoCs, plus RF/5G/IEEE standards experience, are highly valued for