Post-Silicon High-Speed Interface Validation Engineer

Amazon Web Services (AWS); Austin (TX); On-site; USD 144,000 - 194,000; Full time

Benefits offered by this job

Health insurance

401(k) matching

Paid time off

Parental leave

Job summary

Annapurna Labs (U.S.) Inc. in Austin, TX, part of AWS, seeks a highly skilled validation engineer to validate high-speed I/O interfaces on next-generation ML accelerators.

You will work in a lab-focused role, performing eye-diagram analysis, jitter decomposition, and margin tuning to ensure robust performance across PCIe, HBM, UCIe, and SerDes links. You'll develop compliance test suites, validate interconnect reliability, and collaborate with PHY teams to optimize equalization and margins,

Qualifications

• 3+ years of non-internship professional software development experience.
• 2+ years of non-internship design or architecture experience for new and existing systems.
• Experience with RF measurement equipment including power meters, spectrum analyzers, vector signal generators, network analyzers, oscilloscopes.
• Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering, or experience in test setup automation using MATLAB, Python, or Perl.
• 3+ years of hands-on experience validating or characterizing at least one high-speed interface technology (HBM, PCIe, DDR, SerDes, or UCIe).
• Proficiency with signal integrity measurement techniques: eye diagram analysis, jitter decomposition, and voltage/timing margin assessment.

Responsibilities

• Validate high-speed interfaces end-to-end from PHY training through sustained traffic.
• Perform electrical characterization: eye diagrams, jitter analysis, voltage margin, and equalization tuning.
• Execute protocol-level compliance testing and interoperability validation against industry specifications.
• Stress-test links across PVT corners and aging conditions.
• Debug link training failures, bit errors, and performance degradation using lab instrumentation and silicon debug features.
• Collaborate with PHY design teams on equalization optimization, margin improvement, and silicon feedback.

Skills

Software development

System design

High-speed interface validation

RF measurement concepts

Education

Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering

Tools

RF measurement equipment

Oscilloscopes

Spectrum analyzers

Vector signal generators

Network analyzers

Power meters

Job description

Annapurna Labs (U.S.) Inc. in Austin, TX, part of AWS, seeks a highly skilled validation engineer to validate high-speed I/O interfaces on next-generation ML accelerators.

You will work in a lab-focused role, performing eye-diagram analysis, jitter decomposition, and margin tuning to ensure robust performance across PCIe, HBM, UCIe, and SerDes links. You'll develop compliance test suites, validate interconnect reliability, and collaborate with PHY teams to optimize equalization and margins,