Senior TPU Silicon Validation Engineer (AI/ML)

Google LLC

Sunnyvale (CA)

On-site

USD 163,000 - 236,000

Full time

5 days ago
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Job summary

Google is seeking a Senior Silicon Validation Engineer in Sunnyvale to drive validation for TPU architectures and custom silicon integration. You will shape pre- and post-silicon validation strategies, partnering with hardware, systems, and software teams to ensure robust performance and reliability.

The role emphasizes testing, qualification, and test design across power, memory, and high-speed interfaces, with opportunities to impact AI/ML hardware at scale.

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
  • 8 years of hardware engineering and ASIC design experience.
  • Experience with design validation, test planning, and test design.

Responsibilities

  • Own bringup and NPI phases to enable custom silicon products (boot, PCIe, memory, compute cores, power).
  • Design, develop, operate, and maintain detailed validation tests and test plans with cross-functional teams.
  • Perform system characterization, qualification, and debugging to root-cause failures in pre-silicon and post-silicon stages.
  • Provide feedback to improve features like power management, performance, and reliability across generations.
  • Collaborate with customers, systems, manufacturing, diagnostics, and vendor teams to shift left in production and deployment.

Skills

Hardware engineering
ASIC digital design
Design validation
Test planning
Test design

Education

Bachelor's degree (EE/CE/CS)

Job description

Google is seeking a Senior Silicon Validation Engineer in Sunnyvale to drive validation for TPU architectures and custom silicon integration. You will shape pre- and post-silicon validation strategies, partnering with hardware, systems, and software teams to ensure robust performance and reliability.

The role emphasizes testing, qualification, and test design across power, memory, and high-speed interfaces, with opportunities to impact AI/ML hardware at scale.

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