Senior Staff Engineer, Microelectronics Packaging & SiP

ttmtechnologies; City of Syracuse (NY); Sur place; USD 101 000 - 178 000; Plein temps

Résumé du poste

TTM Technologies, Inc. in the United States is seeking a Staff Engineer – Microelectronics Packaging Technology to lead design of advanced SiPs and module packages, with 50-130 micron flip-chip interconnects, WLP bumped die, and embedded die.

You will assess manufacturability and provide 3D designs using SOLIDWORKS. You will run FEM simulations in ANSYS to evaluate chip-package and package-board interactions, heat flow, and reliability; develop design infrastructure; and collaborate with

Qualifications

• Bachelor’s degree in mechanical engineering, that includes material’s coursework. Master’s education will be a plus
• Minimum 9+ Years Relevant Experience
• 6 to 7 years of hands-on semiconductor packaging development experience

Responsabilités

• Lead the design and development of advanced SiPs and module package solutions using 2D/3D packaging technologies with 50micron to 130micron flip-chip interconnects, WLP bumped die, and embedded die.
• Provide technical leadership in support of package architecture selection by generating 3D package designs, manufacturability, and risk assessments.
• Generate and optimize detailed package designs in 3D environment using SOLIDWORKS. This will be done in collaborate with RF/MW/electrical engineering teams
• Perform complex physics-based mechanical and vibration simulations for SiP configurations using FEM tools (ANSYS) to analyze chip-package interaction, package-board interaction, warpage, stress, and reliability risks.
• Perform SiP-level thermal simulations for microelectronics packages using FEM tools (ANSYS)
• Define and assist in the buildup of SiP design infrastructure that includes package design flows, 3D modeling and simulation methodologies, generating package design rules.
• Lead or assist in writing white papers, technical proposals, and conference publications.
• Benchmark industry best practices and evaluate emerging technologies for package design, assembly materials, and process innovations.
• Perform and collate tradeoff analysis on ambiguous problems that considers interdisciplinary nature of semiconductor packages.
• Communicate complex technical concepts effectively to cross-functional project teams, operations, suppliers, business teams
• Be creative in designing and developing innovative integration methods that foster the spirit of differentiation and generation of IPs
• Assist in project management by providing planning inputs for defining packaging tasks, schedule, and cost.

Connaissances

3D Modeling

FEA analysis

SOLIDWORKS

ANSYS

Thermal analysis

Mechanical design

Formation

Bachelor’s degree in mechanical engineering

Master’s degree (preferred)

Outils

SOLIDWORKS

ANSYS

Description du poste

TTM Technologies, Inc. in the United States is seeking a Staff Engineer – Microelectronics Packaging Technology to lead design of advanced SiPs and module packages, with 50-130 micron flip-chip interconnects, WLP bumped die, and embedded die.

You will assess manufacturability and provide 3D designs using SOLIDWORKS. You will run FEM simulations in ANSYS to evaluate chip-package and package-board interactions, heat flow, and reliability; develop design infrastructure; and collaborate with