Senior STA Design Manager – SoC Timing & Flow

NXP Semiconductors; Austin (TX); In loco; USD 180.000 - 280.000; Tempo pieno

Descrizione del lavoro

NXP Semiconductors seeks a Static Timing Design Manager for its AI and Chip Engineering SoC Implementation team in Austin. You will lead timing activities for MPU SoCs, develop and verify STA constraints, and drive timing closure across subsystems and full SoCs.

You will collaborate with RTL/IP teams, architecture and DV/EDA vendors to improve timing flows and implement cutting-edge STA methodologies in fast-paced, advanced node projects.

Competenze

• 15+ years of experience in Physical Design for complex SoCs.
• Experience with at least 3 years of STA lead roles.
• Excellent communication skills, both oral and written.
• Innovate and adapt to the rapid use of AI and agents in STA & PD domains.

Mansioni

• Timing Analysis activities for MPU SoCs.
• Expertise in developing, implementing and verifying STA constraints
• Expertise in efficient closure of Subsystem as well as SoC-level timing
• In-depth knowledge of industry standards and practices in Timing closure, Physical Design, Floor-planning, and Place & Route
• Knowledge of basic Architecture and Verilog to collaborate with RTL and IP design teams for timing fixes
• Contribute to timing flow and methodology improvements
• Collaborate with members of a global design team to complete large SoC (system-on-chip) projects.

Conoscenze

Timing analysis

STA leadership

Cross-functional collaboration

Excellent communication

Formazione

BS or MS in Electrical or Computer Engineering

Strumenti

EDA tools

Descrizione del lavoro

NXP Semiconductors seeks a Static Timing Design Manager for its AI and Chip Engineering SoC Implementation team in Austin. You will lead timing activities for MPU SoCs, develop and verify STA constraints, and drive timing closure across subsystems and full SoCs.

You will collaborate with RTL/IP teams, architecture and DV/EDA vendors to improve timing flows and implement cutting-edge STA methodologies in fast-paced, advanced node projects.