Senior SRAM Design Engineer - Lead High-Performance Memory

Engg; San Jose (CA); On-site; USD 163,000 - 253,000; Full time

Benefits offered by this job

4+ weeks paid time off

Fertility care/adoption stipend

Medical travel support

Therapy sessions

Onsite Café and gym

Flexible work environment

Job summary

Samsung Semiconductor in San Jose, CA seeks a Staff Engineer, SRAM Circuit Design to lead end‑to‑end SRAM development for cutting‑edge devices. You will drive high‑performance, low‑power memory circuits and guide a team across design, layout, verification, and test.

You will apply deep SRAM architecture expertise and work on nodes like 2nm/3nm/5nm, mentoring junior engineers and collaborating with cross‑functional teams to meet aggressive PPA targets.

Qualifications

• Degree in EE with 10+ years of industry experience or MS with 8+ years preferred.
• Proven SRAM/memory design experience and successful nodes.
• Strong device physics and process tech knowledge (FinFET, GAA, SOI).
• Expert SRAM architecture know-how: bitcells, sense amps, write/read paths.
• Experience with timing, power, and manufacturability analysis (DFM).
• Proficient in circuit simulation and design automation scripting.

Responsibilities

• Lead end‑to‑end SRAM design of high‑performance arrays and decoders.
• Optimize designs for speed, power, and area; improve yield.
• Develop layouts and perform DRC/LVS verifications.
• Evaluate tradeoffs to meet design targets across nodes (2nm, 3nm, 5nm).
• Develop and automate design methodologies and scripts.
• Collaborate with product/test to support silicon bring‑up.
• Mentor junior engineers and share SRAM best practices.
• Conduct circuit simulations (HSPICE, Spectre) to validate performance.
• Contribute to patents, papers, and conferences.

Skills

SRAM design

Low-power memory

Memory circuit concepts

Mentoring

Cross-functional collaboration

Education

B.S. Electrical Engineering

M.S. Electrical Engineering

Tools

Spectre

HSPICE

Cadence Virtuoso

Python

Perl

TCL

Job description

Samsung Semiconductor in San Jose, CA seeks a Staff Engineer, SRAM Circuit Design to lead end‑to‑end SRAM development for cutting‑edge devices. You will drive high‑performance, low‑power memory circuits and guide a team across design, layout, verification, and test.

You will apply deep SRAM architecture expertise and work on nodes like 2nm/3nm/5nm, mentoring junior engineers and collaborating with cross‑functional teams to meet aggressive PPA targets.