High-Performance CPU SRAM Design & Layout Engineer

Qualcomm; Santa Clara (CA); On-site; USD 148,000 - 222,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a CPU SRAM Design & Layout Engineer to drive high-performance, low-power memory solutions for cutting-edge CPUs.

You will design, analyze, and implement SRAMs and register files from schematic to physical realization, coordinating with circuit, CAD, and physical design teams. You will own memory development from layout to sign-off, perform timing, power, and reliability analysis, and contribute to memory deliverables and models for production.

Qualifications

• Bachelor's degree in Electrical Engineering or related field; 5+ years in hardware.
• Master's degree in Electrical Engineering; 1+ year in hardware.
• PhD in Electrical Engineering is acceptable.

Responsibilities

• Design and develop custom SRAM and register file circuits optimized for high performance, low power, and scalability.
• Create schematics and perform circuit-level design and optimization.
• Develop memory floorplans and custom layouts based on project requirements and schematics.
• Own memory implementation from initial architecture and floorplanning through physical verification and signoff.
• Perform and oversee layout construction, verification, and optimization.
• Read and interpret process design rules to create robust, manufacturable layouts.
• Execute LVS, DRC, ERC, and other physical verification checks.
• Identify and resolve design, verification, and layout issues throughout the development process.
• Perform functional verification, simulation, and margin analysis across process, voltage, and temperature conditions.
• Perform timing, power, and electrical characterization of memory designs.
• Generate and validate all required memory deliverables and collateral models.
• Collaborate with CAD teams to improve modeling, automation, and characterization flows.
• Work with Physical Design teams to resolve memory PPA challenges.
• Provide layout guidance and physical implementation recommendations to improve circuit performance, reliability, and manufacturability.
• Contribute to DFT, modeling, automation, and analysis flow development where applicable.
• Develop realistic project schedules and independently drive memory design and implementation activities to completion.
• Provide technical insight and recommendations regarding memory architecture, layout strategy, area optimization, and methodology improvements.

Skills

SRAM design

Register files

Custom memory layout

Circuit simulation

Timing analysis

FinFET tech

Sub-micron layout

Memory PD flow

Education

Bachelor's in Electrical Engineering

Master's in Electrical Engineering

PhD in Electrical Engineering

Tools

Cadence Virtuoso

Calibre LVS/DRC

NanoTime

Ansys EMIR

Liberate

SKILL scripting

Job description

Qualcomm Technologies, Inc. is seeking a CPU SRAM Design & Layout Engineer to drive high-performance, low-power memory solutions for cutting-edge CPUs.

You will design, analyze, and implement SRAMs and register files from schematic to physical realization, coordinating with circuit, CAD, and physical design teams. You will own memory development from layout to sign-off, perform timing, power, and reliability analysis, and contribute to memory deliverables and models for production.