Senior SoC Verification Engineer - Contract (Remote)

Intellectual Capital Resources Ltd; California (MO); Híbrido; USD 120 000 - 170 000; Tempo integral

Resumo da oferta

Intellectual Capital Resources Ltd seeks a Design Verification Engineer on a contract basis in Palo Alto, CA, with remote consideration. The role involves owning verification for SoC blocks and subsystems from testbench architecture to coverage closure and signoff, across customer programmes.

You will visit the site one week per month and collaborate with customer design and verification teams, using SystemVerilog/UVM and AI-assisted tools to accelerate test generation and debug.

Qualificações

• 6+ years hands-on design verification experience.
• Multiple production tapeouts completed.
• Strong SystemVerilog and UVM proficiency.
• Experience with ARM CPU clusters, interconnects, PCIe, Ethernet, or CPU/subsystem integration.

Responsabilidades

• Own verification plans, testbench architecture, and signoff.
• Develop SystemVerilog/UVM environments, sequences, scoreboards, and checkers.
• Verify PCIe, Ethernet, CPU integration, interconnects, and switches.
• Run regressions, track coverage, and debug failures.
• Set up verification flows for new programmes.
• Use AI-assisted tools for test generation, debug, and coverage closure.

Conhecimentos

SystemVerilog

UVM

Debugging

Independent work

Ferramentas

JasperGold

AI-assisted verification tools

Emulation

Descrição da oferta de emprego

Intellectual Capital Resources Ltd seeks a Design Verification Engineer on a contract basis in Palo Alto, CA, with remote consideration. The role involves owning verification for SoC blocks and subsystems from testbench architecture to coverage closure and signoff, across customer programmes.

You will visit the site one week per month and collaborate with customer design and verification teams, using SystemVerilog/UVM and AI-assisted tools to accelerate test generation and debug.