Senior SoC Verification Engineer — Remote + Equity

Inspire Semiconductor; Austin (TX); Hybrid; USD 120,000 - 180,000; Full time

Benefits offered by this job

Equity

Hybrid work in Austin

Remote work considered for exceptional

Job summary

Inspire Semiconductor seeks a skilled SoC Design Verification Engineer to verify complex ASIC/SoC designs, focusing on the RISC-V core, network, and IP integrations. You will develop verification plans, build UVM-based testbenches, and ensure functional correctness before tape-out.

The role requires 5+ years of hands-on verification, strong SystemVerilog/UVM knowledge, and experience with regression, coverage, and scripting.

Qualifications

• Bachelor's or Master's degree in Electrical, Electronics, or Computer Engineering (or related field).
• 5+ years hands-on experience in ASIC/SoC design verification.
• Strong proficiency in SystemVerilog, UVM, and simulation tools (e.g., Xcelium).
• Solid understanding of digital design fundamentals, RTL design, and synthesis flow.
• Experience with functional coverage, assertions, and scoreboarding.
• Scripting/programming skills (Python, Perl, TCL, C/C++).
• Knowledge of common bus protocols (AXI, AHB, PCIe, DDR4/5).
• Version control and CI tools (Git, Jenkins, Jira, Confluence).
• Strong debugging skills, analytical thinking, and attention to detail.

Responsibilities

• Develop and execute verification plans for complex SoC digital designs.
• Create and maintain UVM/SystemVerilog-based testbenches and environments.
• Write, debug, and execute constrained-random and directed test cases.
• Implement RISC-V ISA compliance tests.
• Perform functional coverage analysis and close coverage gaps.
• Perform regression runs, analyze failures, and drive bug closure.
• Connect simulations to real user interfaces, stimulus generators, and checkers.
• Collaborate with RTL, architecture, and software teams.
• Contribute to verification methodologies and automation scripts.
• Perform preliminary debug of discovered issues.

Skills

SystemVerilog

UVM

Constrained-random

Directed test cases

Python

Debugging

Regression testing

RTL design understanding

Education

Bachelor's or Master's in Electrical/ Electronics/ Computer Engineering

Tools

Xcelium

Cadence EDA tools

Zebu

Palladium

Verdi

Job description

Inspire Semiconductor seeks a skilled SoC Design Verification Engineer to verify complex ASIC/SoC designs, focusing on the RISC-V core, network, and IP integrations. You will develop verification plans, build UVM-based testbenches, and ensure functional correctness before tape-out.

The role requires 5+ years of hands-on verification, strong SystemVerilog/UVM knowledge, and experience with regression, coverage, and scripting.