Senior SoC Layout/EDA Designer - RF/Analog Focus

Qorvo, Inc.

Town of Florida (NY)

On-site

USD 120,000 - 170,000

Full time

14 days+
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Job summary

Qorvo, Inc. in Ft. Lauderdale, FL, is seeking a Staff SoC Layout/EDA Designer to join a cross-functional team delivering System-on-Chip products from concept to high-volume production.

You will work with analog/RF/mixed-signal and digital engineers to optimize layouts, automate workflows via scripting, and lead tape-out processes while mentoring junior designers. A minimum of 5+ years in layout with Cadence Virtuoso is required.

Qualifications

  • Associate’s degree in Electronic Engineering or related field required (Bachelor's preferred).
  • 5+ years of relevant industry experience in SoC layout design.
  • Strong skills with Cadence Virtuoso and PDK layout tools; experience with physical verification tools.
  • Experience with sub-micron CMOS nodes (40nm and below) and analog/RF/mixed-signal layout.
  • Knowledge of digital physical design flows and scripting languages.

Responsibilities

  • Create/optimize layouts of complex blocks and chip-level SoC macros with engineers.
  • Automate layout workflows through scripting and batch operations.
  • Produce high-quality analog/RF/mixed-signal macros and formal verifications.
  • Own block-level layouts and top-level floor planning with full verification.
  • Lead layout flows, tape-out processes, and project database management.

Skills

Cadence Virtuoso
PDK layout tools
Physical verification tools
DRC
LVS
ERC
PnR parasitics
LVL
VHDL
Verilog
LEF
DEF
Linux shell
Makefile
SKILL
Python

Education

Associate’s degree in Electronic Engineering
Bachelor's degree preferred

Tools

Cadence Virtuoso
PDK layout tools
Pegasus
Calibre
Linux shell
Makefile
SKILL
TCL
Python

Job description

Qorvo, Inc. in Ft. Lauderdale, FL, is seeking a Staff SoC Layout/EDA Designer to join a cross-functional team delivering System-on-Chip products from concept to high-volume production.

You will work with analog/RF/mixed-signal and digital engineers to optimize layouts, automate workflows via scripting, and lead tape-out processes while mentoring junior designers. A minimum of 5+ years in layout with Cadence Virtuoso is required.

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