Staff SoC Layout/EDA Designer

Qorvo, Inc.; Town of Florida (NY); On-site; USD 120,000 - 170,000; Full time

Job summary

Qorvo, Inc. in Ft. Lauderdale, FL, is seeking a Staff SoC Layout/EDA Designer to join a cross-functional team delivering System-on-Chip products from concept to high-volume production.

You will work with analog/RF/mixed-signal and digital engineers to optimize layouts, automate workflows via scripting, and lead tape-out processes while mentoring junior designers. A minimum of 5+ years in layout with Cadence Virtuoso is required.

Qualifications

• Associate’s degree in Electronic Engineering or related field required (Bachelor's preferred).
• 5+ years of relevant industry experience in SoC layout design.
• Strong skills with Cadence Virtuoso and PDK layout tools; experience with physical verification tools.
• Experience with sub-micron CMOS nodes (40nm and below) and analog/RF/mixed-signal layout.
• Knowledge of digital physical design flows and scripting languages.

Responsibilities

• Create/optimize layouts of complex blocks and chip-level SoC macros with engineers.
• Automate layout workflows through scripting and batch operations.
• Produce high-quality analog/RF/mixed-signal macros and formal verifications.
• Own block-level layouts and top-level floor planning with full verification.
• Lead layout flows, tape-out processes, and project database management.

Skills

Cadence Virtuoso

PDK layout tools

Physical verification tools

DRC

LVS

ERC

PnR parasitics

LVL

VHDL

Verilog

LEF

DEF

Linux shell

Makefile

SKILL

Python

Education

Associate’s degree in Electronic Engineering

Bachelor's degree preferred

Tools

Cadence Virtuoso

PDK layout tools

Pegasus

Calibre

Linux shell

Makefile

SKILL

TCL

Python

Job description

Staff SoC Layout/EDA Designer

Experience Level: Professional

Job Type: Regular

Location: Ft. Lauderdale, FL, US, 33309

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visitwww.qorvo.com to learn how our innovative team is helping connect, protect and power our planet.

Summary

As Staff Layout Designer, you will work as part of a cross-functional,globalteamdeliveringSystem-on-Chip (SoC) products from concept tohighvolume productionfor the consumer, industrial, and automotive industries.

Responsibilities

• Work with analog/RF/mixed-signal design engineers and digital engineers to create/optimize layouts of complex blocks and chip-level SoC macros
• Work on continuous-improvement projects to automate/customize layout work flows through scripting and batch-mode operations
• Producehigh qualityanalog/RF/mixed-signal macros using industry best practices for layout and physical verification
• Own block-levellayout designsand top-level floor planning includingfull hierarchicalverification/debug
• Lead, document, and communicate layout design flows and reviews efficientlyincludingthetape-out processandprojectdatabase management/archive
• Help manage/support layout contractors and mentor junior layout designers
• Collaborate withglobalteam engineers/designers to ensure designs are specification compliant and on time
• Work independently on complex tasks while stayingin syncwith team activities/plan

Qualifications

• Minimum of Associate’s degree in Electronic Engineering or related field (Bachelor's degree preferred)
• 5+ years relevantindustryworkexperiencerequired
• Strongworkingskills withCadenceVirtuosoand PDKlayoutdesign tools (OA, CDL, GDS).
• Strong working skills withphysical verification tools (Pegasus/Calibre)and flows(DRC, LVS, ERC, PERC, LVL)
• Detailed experiencewithanalog/RF/mixed-signal layoutindeep sub-micron,CMOS nodes (40nm and lower)
• UnderstandingofLDE,ANT,ESD/LUP,NTN/TW/SOIisolation, matching,PnRparasitics,andEMIRconcepts
• Knowledge of digital physical design flows and techniques(VHDL, Verilog,LEF, DEF)
• Knowledgeofscripting with Linux shell,Makefile,Modules,SKILL,TCL,Pythonand/orAI-LLM clients

This position is not eligible for visa sponsorship by the Company.

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MAKE A DIFFERENCE AT QORVO

We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets – we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.

We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.