Senior SoC DFT Architect for HBM Systems

Micron Technology; Folsom (CA); On-site; USD 146,000 - 309,000; Full time

Job summary

Micron Technology is seeking a Principal SoC DFT Engineer in the Heterogeneous Integration Group to own DFT architecture, implementation, and signoff for HBM base-die designs, collaborating across RTL, verification, physical design and product engineering.

This role focuses on DFT flow, ATPG readiness, lint, CDC, and signoff, with opportunities to influence early design decisions and bring-up, as described in the job posting.

Qualifications

• Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or related field.
• 7+ years of relevant experience in SoC design, DFT, or implementation for complex digital ASICs or SoCs.
• Job title and level can scale depending on experience and qualifications.

Responsibilities

• Own SoC-level DFT implementation, including scan, MBIST, LBIST, boundary scan, and test access architectures for HBM base-die designs.
• Drive DFT architecture definition early in the design cycle, ensuring alignment with SoC integration, floor planning, timing, power, and physical design constraints.
• Implement and integrate DFT logic at the block, subsystem, and full-chip levels, working closely with RTL and integration teams.
• Own DFT flow execution and signoff, including lint, CDC, DFT rule checks, ATPG readiness, and coverage closure.
• Collaborate with physical design teams to ensure DFT solutions are optimized for placement, routing, timing closure, and DRC/LVS signoff.
• Work closely with verification, product engineering, test, probe, and manufacturing teams to ensure testability, diagnosability, and smooth silicon bring-up.
• Support pre-silicon debug of DFT-related issues and assist with post-silicon bring-up and yield/debug analysis.
• Partner with CAD and methodology teams to define, improve, and standardize DFT flows across HBM SoC programs.

Skills

DFT Architecture

ATPG Concepts

RTL-to-GDS flows

Python/Scripting

Team collaboration

Education

Bachelor's degree or higher in Electrical Engineering, Computer Engineering, or related field

Tools

Siemens EDA

Synopsys EDA

Cadence EDA

Job description

Micron Technology is seeking a Principal SoC DFT Engineer in the Heterogeneous Integration Group to own DFT architecture, implementation, and signoff for HBM base-die designs, collaborating across RTL, verification, physical design and product engineering.

This role focuses on DFT flow, ATPG readiness, lint, CDC, and signoff, with opportunities to influence early design decisions and bring-up, as described in the job posting.