Principal DFT Engineer, HBM

Micron Technology, Inc

Folsom (CA)

On-site

USD 120,000 - 160,000

Full time

14 days+

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Job summary

Micron Technology, Inc in Folsom, California is seeking a Principal DFT Engineer to lead DFT implementation and architecture definition for HBM base-die designs. Candidates should have 7+ years of experience in SoC design and a Bachelor's degree in Electrical Engineering or Computer Engineering.

The successful candidate will work closely with various teams to ensure testability and smooth silicon bring-up using advanced EDA tools. We promote equal opportunity and welcome applicants from diverse backgrounds.

Qualifications

  • 7+ years of relevant experience in SoC design, DFT, or implementation for complex digital ASICs or SoCs.

Responsibilities

  • Own SoC-level DFT implementation, including scan, MBIST, LBIST.
  • Drive DFT architecture definition early in the design cycle.
  • Implement and integrate DFT logic at the block and full-chip levels.
  • Collaborate with physical design teams for optimization.

Skills

Experience with scan insertion
MBIST/LBIST architectures
JTAG/boundary scan
ATPG concepts
Familiarity with full RTL-to-GDS SoC flows
Proficiency with industry-standard EDA tools
Scripting languages (Python, Tcl, Perl)

Education

Bachelor’s degree in Electrical Engineering or Computer Engineering

Tools

EDA tools from Siemens
EDA tools from Synopsys
EDA tools from Cadence

Job description

Principal DFT Engineer, HBM

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Responsibilities
  • Own SoC-level DFT implementation, including scan, MBIST, LBIST (as applicable), boundary scan (JTAG), and test access architectures for HBM base‑die designs.
  • Drive DFT architecture definition early in the design cycle, ensuring alignment with SoC integration, floor planning, timing, power, and physical design constraints.
  • Implement and integrate DFT logic at the block, subsystem, and full‑chip levels, working closely with RTL and integration teams.
  • Own DFT flow execution and signoff, including lint, CDC, DFT rule checks, ATPG readiness, and coverage closure.
  • Collaborate with physical design teams to ensure DFT solutions are optimized for placement, routing, timing closure, and DRC/LVS signoff.
  • Work closely with verification, product engineering, test, probe, and manufacturing teams to ensure testability, diagnosability, and smooth silicon bring‑up.
  • Support pre‑silicon debug of DFT‑related issues and assist with post‑silicon bring‑up and yield/debug analysis.
  • Partner with CAD and methodology teams to define, improve, and standardize DFT flows across HBM SoC programs.
Required Experience
  • Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or related field.
  • 7+ years of relevant experience in SoC design, DFT, or implementation for complex digital ASICs or SoCs.
  • Job title and level can scale depending on experience and qualifications.
Successful Candidates Will Have
  • Experience with scan insertion, MBIST/LBIST architectures, JTAG/boundary scan, and ATPG concepts.
  • Familiarity with full RTL‑to‑GDS SoC flows, including interaction between DFT, synthesis, STA, and physical design.
  • Experience working with large, complex SoCs involving multiple IPs and subsystems.
  • Proficiency with industry‑standard EDA tools from Siemens, Synopsys, and/or Cadence for DFT and implementation.
  • Familiarity with scripting languages (Python, Tcl, Perl, etc.) for flow automation.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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