Principal SoC DFT Engineer HBM Equity Eligible

1000 Micron Technology, Inc.; Folsom (CA); On-site; USD 146,000 - 309,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid family leave

Paid time-off program

Job summary

1000 Micron Technology, Inc. is seeking a Principal SoC DFT Engineer to lead DFT architecture, implementation, and signoff for complex HBM base-die SoC designs.

The ideal candidate will collaborate with RTL design, verification, and physical design teams to ensure robust test solutions, with a minimum of 7 years experience required. The position offers a generous compensation package including healthcare options, paid time off, and equity opportunities.

Qualifications

• 7+ years of relevant experience in SoC design, DFT, or implementation for complex digital ASICs.
• Familiarity with full RTL-to-GDS SoC flows.
• Experience with complex SoCs involving multiple IPs and subsystems.

Responsibilities

• Own SoC-level DFT implementation, including scan and boundary scan architectures.
• Drive DFT architecture definition early in the design cycle.
• Implement and integrate DFT logic at various levels within SoC.

Skills

DFT implementation

Scan insertion

JTAG/boundary scan

Scripting languages

EDA tools (Siemens, Synopsys, Cadence)

Education

Bachelor’s degree in Electrical Engineering

Tools

Python

Tcl

Perl

Job description

1000 Micron Technology, Inc. is seeking a Principal SoC DFT Engineer to lead DFT architecture, implementation, and signoff for complex HBM base-die SoC designs.

The ideal candidate will collaborate with RTL design, verification, and physical design teams to ensure robust test solutions, with a minimum of 7 years experience required. The position offers a generous compensation package including healthcare options, paid time off, and equity opportunities.