Senior SoC Architect & Tech Lead

191 Altera Corporation; San Jose (CA); On-site; USD 232,000 - 330,000; Full time

Job summary

Altera is seeking a Senior Lead Engineer, Design and Architecture to provide technical leadership for the architecture and development of high-performance silicon and platform subsystems across our programmable device portfolio. This hands-on architect will define complex SoC and interconnect solutions, guiding execution from concept through production silicon.

The role requires deep expertise in ASIC/SoC architecture, high-bandwidth interconnect, memory systems, and networking or

Qualifications

• Bachelor’s degree in Electrical/Computer Engineering or Computer Science with 15+ years in semiconductor/SoC/FPGA product development.
• Experience defining and delivering complex silicon architectures from concept through production.
• Deep expertise in on-chip networks, memory hierarchy, cache coherency, and high-performance networking datapaths.
• Experience across silicon development lifecycle with design, verification, emulation, physical design, DFT, firmware/software, and post-silicon teams.

Responsibilities

• Define system, subsystem, and microarchitecture for complex SoC and ASIC platforms with emphasis on high-performance interconnect, data movement, memory hierarchy, and scalable compute or networking subsystems.
• Lead architecture exploration and make technically sound tradeoffs across performance, power, area, bandwidth, latency, reliability, scalability, cost, and schedule.
• Develop architectural specifications, performance models, and implementation plans that align requirements across hardware, firmware, software, validation, and product teams.
• Own key architecture and design decisions through the full silicon lifecycle: concept, microarchitecture, RTL, integration, verification, emulation, implementation, bring-up, performance debug, and production readiness.
• Provide hands-on technical leadership for on-chip networks, routing and arbitration, flow control, cache or memory-coherency mechanisms, memory subsystems, and high-speed interfaces, as applicable to the product roadmap.
• Drive cross-functional resolution of complex technical issues, using data and rigorous analysis to identify root cause, evaluate alternatives, and close critical architectural or execution risks.
• Partner with design, verification, physical design, DFT, firmware, software, product engineering, and manufacturing teams to ensure architecture intent is preserved through implementation and silicon validation.
• Establish and improve scalable design and verification methodologies, automation, and quality practices that increase engineering velocity, predictability, and first-pass silicon success.
• Mentor senior engineers and technical leads, raise the technical bar through reviews and design guidance, and influence engineering direction across multiple teams and product generations.
• Engage with internal and external partners, including IP, EDA, and foundry providers, as needed to inform architecture, implementation strategy, and roadmap planning.

Skills

ASIC/SoC architecture

High-bandwidth interconnect

Memory hierarchy

Networking / infrastructure silicon

RTL design

Verification

Post-silicon validation

SystemVerilog

Python automation

Architecture modeling

Education

Bachelor’s degree in Electrical/Computer Engineering or Computer Science

Tools

SystemVerilog

Simulation

Formal verification

Emulation

Equivalence checking

Synthesis

Static timing analysis

Implementation flows

Job description

Altera is seeking a Senior Lead Engineer, Design and Architecture to provide technical leadership for the architecture and development of high-performance silicon and platform subsystems across our programmable device portfolio. This hands-on architect will define complex SoC and interconnect solutions, guiding execution from concept through production silicon.

The role requires deep expertise in ASIC/SoC architecture, high-bandwidth interconnect, memory systems, and networking or