Senior SoC Architect: Memory Subsystem & Fabric

Samsung Research America; Mountain View (CA); On-site; USD 130,000 - 160,000; Full time

Job summary

Samsung Research America in Mountain View is seeking a Senior Engineer to lead the architecture of next-gen SoCs. This role involves guiding innovative features for the memory subsystem and collaborating across teams to deliver architecture proposals.

The ideal candidate has at least 3 years in SoC design and extensive knowledge of memory systems and computer architecture. Experience with JEDEC standards is essential.

Qualifications

• 3+ years of experience in SoC or ASIC design and architecture.
• Prior experience in Fabric, System Cache, DRAM controller Architecture is required.
• Understanding of memory scheduling and QoS.

Responsibilities

• Guide on development of innovative Fabric, System cache, and DRAM controller features.
• Evaluate architecture proposal benefits with SoC Architects team.
• Direct performance modeling studies for next generation microarchitecture.

Skills

SoC or ASIC design and architecture

Memory controller architecture

ARM bus infrastructure

JEDEC standards (LPDDR, DDR, HBM)

Performance modeling/simulation

Education

BSc, Masters, or PhD in Computer Science/Engineering

Tools

BookSim Simulator

Platform Architect

Job description

Samsung Research America in Mountain View is seeking a Senior Engineer to lead the architecture of next-gen SoCs. This role involves guiding innovative features for the memory subsystem and collaborating across teams to deliver architecture proposals.

The ideal candidate has at least 3 years in SoC design and extensive knowledge of memory systems and computer architecture. Experience with JEDEC standards is essential.