Staff Engineer, SoC Memory Subsystem & Fabric Architect

Samsung Electronics GmbH; Mountain View (CA); On-site; USD 179,200 - 246,150; Full time

Job summary

Samsung Electronics GmbH is seeking a Staff Engineer for SoC Architecture specializing in Memory Subsystem and Interconnect in Mountain View, CA. This hands-on role involves leading contributions to the architecture of Fabric, System Cache, and DRAM Controller subsystems.

The ideal candidate will possess over 8 years of experience in SoC design, a Master's degree in Computer Science or Engineering, and a deep understanding of memory architecture. Join a dynamic lab committed to cutting-edge technology and innovation.

Qualifications

• 8+ years of experience in SoC or ASIC design and architecture.
• Prior direct experience in Fabric, System Cache, DRAM controller Architecture.
• Detailed understanding of memory controller architecture and scheduling.

Responsibilities

• Guide development of innovative Fabric, System cache and DRAM controller features.
• Identify and deliver subsystem architecture proposals.
• Collaborate across teams to bring microarchitectural proposals to fruition.

Skills

SoC or ASIC design and architecture

Fabric, System Cache, DRAM controller Architecture

ARM bus infrastructure (ACE/AXI/AHB)

Understanding of memory scheduling and QoS

Knowledge of JEDEC standards (LPDDR, DDR, HBM)

Education

BSc, Masters, or PhD in Computer Science/Engineering

Tools

BookSim Simulator

Platform Architect

Job description

Samsung Electronics GmbH is seeking a Staff Engineer for SoC Architecture specializing in Memory Subsystem and Interconnect in Mountain View, CA. This hands-on role involves leading contributions to the architecture of Fabric, System Cache, and DRAM Controller subsystems.

The ideal candidate will possess over 8 years of experience in SoC design, a Master's degree in Computer Science or Engineering, and a deep understanding of memory architecture. Join a dynamic lab committed to cutting-edge technology and innovation.