Senior SoC Architect: Digital & High-Speed I/O Lead

Ignite Next GmbH; United States; Hybride; USD 180 000 - 240 000; Plein temps

Avantages offerts par ce poste

Insurance

Pension

Stock options

Résumé du poste

Black Semiconductor is seeking a Senior SoC Architect to drive the architecture of the EPIC SoC, translating MRD into a complete PRD across digital, analog, photonics, and memory subsystems. You will own the digital and high-speed I/O subsystems, including SerDes and protocol logic for UCIe, PCIe, and Ethernet, collaborating with multiple architecture teams to deliver a coherent full-chip design.

You will lead cross-domain integration, analyze full-chip performance trade-offs, and partner with

Qualifications

• 7–10 years of SoC/product architecture ownership with MRD to PRD work.
• Hands-on high-speed I/O expertise, especially SerDes and UCIe/PCIe/Ethernet.
• Strong digital subsystem and on-chip interconnect experience.
• Ability to integrate analog/photonics/memory inputs into a single PRD.
• Translate MRD into precise architecture specs and trade-offs.
• Experience evaluating external IPs and design partners.
• Proficient in architecture modeling, Python/C++, and PRD tooling.

Responsabilités

• Provide overall EPIC SoC technical leadership from concept to production.
• Build and document the full product architecture and PRD.
• Own the digital subsystem architecture and on-chip interconnect.
• Own the high-speed I/O architecture including SerDes and protocol logic.
• Collaborate with analog, photonics, packaging, and memory architects.
• Drive PPA trade-off analysis and work with IP vendors on validation.
• Present architecture and PRD to management and secure sign-off.

Connaissances

SoC architecture

High-speed I/O

SerDes protocols

Interconnect fabric

Cross-domain integration

MRD to PRD translation

IP vendor management

Modeling & tooling

Outils

Python

C++

Modeling tools

Architecture tooling

Description du poste

Black Semiconductor is seeking a Senior SoC Architect to drive the architecture of the EPIC SoC, translating MRD into a complete PRD across digital, analog, photonics, and memory subsystems. You will own the digital and high-speed I/O subsystems, including SerDes and protocol logic for UCIe, PCIe, and Ethernet, collaborating with multiple architecture teams to deliver a coherent full-chip design.

You will lead cross-domain integration, analyze full-chip performance trade-offs, and partner with