Senior Silicon Validation Lead - SerDes & System Performance

Synopsys, Inc.; Sunnyvale (CA); Presencial; USD 170.000 - 210.000; Jornada completa

Descripción de la vacante

Synopsys, Inc. in Sunnyvale, CA seeks a senior engineer to lead silicon validation of IP and performance for high-speed interfaces. You will bridge simulation and silicon realities across architecture and validation teams.

The role requires 10+ years in silicon validation, SerDes design and verification, and strong lab debugging skills. Collaboration with platform teams and customers is essential to drive robust, scalable solutions.

Formación

• 10+ years of silicon validation, high-speed interfaces, and system-level performance analysis.
• Expertise in SerDes design and validation, including PCIe and Ethernet protocols.
• Strong knowledge of signal integrity, equalization, coding, and CDR architectures.
• Hands-on lab validation, debug tools, and sim-to-silicon correlation.
• Familiarity with firmware integration and regression testing methodologies.
• Cross-functional collaboration across platform teams and product owners.

Responsabilidades

• Lead silicon validation of IP functionality and performance aligned with architectural intent.
• Support hardware bring-up and firmware integration for early product-version characterization.
• Drive root-cause analysis, workarounds, and fixes during characterization.
• Manage a dedicated validation effort in parallel with characterization activities.
• Validate sim-to-silicon performance of algorithms and key metrics (e.g., AFE curves).
• Provide feedback to system teams for hardware-correlated models and tuning.
• Develop improvements to SerDes algorithms and configurations.
• Incorporate learnings from customer EVBs into future developments.
• Review firmware regression tests for repeatability and robustness.
• Support customer bring-up and drive silicon debug issue resolution.
• Communicate findings to Platform Architects and Product Owners.

Conocimientos

Silicon validation

High-speed interfaces

SerDes design

PCIe protocols

Ethernet protocols

Signal integrity

Lab validation

Regression testing

Firmware integration

Educación

BSc Electrical Engineering

MSc Electrical Engineering

Herramientas

Oscilloscope

Logic analyzers

Lab instrumentation

Debug tools

Descripción del empleo

Synopsys, Inc. in Sunnyvale, CA seeks a senior engineer to lead silicon validation of IP and performance for high-speed interfaces. You will bridge simulation and silicon realities across architecture and validation teams.

The role requires 10+ years in silicon validation, SerDes design and verification, and strong lab debugging skills. Collaboration with platform teams and customers is essential to drive robust, scalable solutions.