Senior Signal and Power Integrity Engineer for ML ASICs

Amazon; Austin (TX); On-site; USD 136,000 - 184,000; Full time

Benefits offered by this job

Health insurance

401(k) matching

Paid time off

Parental leave

Job summary

Annapurna Labs in Austin, TX is seeking a Signal Integrity / Power Integrity Engineer to help define, design, and validate next-generation AWS ML ASICs. You will work with hardware teams to ensure robust SI/PI across packages, PCBs, and interposers, delivering reliable performance for data center workloads.

The ideal candidate has 3+ years in SI/PI, hands-on with Hspice, Cadence, HFSS, and experience in high-speed signaling, power delivery, and advanced packaging. A Master’s degree is preferred.

Qualifications

• 3+ years of experience in signal and power integrity.
• Hands-on with simulation tools like Hspice, Cadence, and HFSS.
• Experience with PCB, packaging interposers (COWOS) and silicon technologies.
• Knowledge of transmission line theory and electromagnetics in SerDes and parallel interfaces.
• Master’s degree in Electrical Engineering (preferred).
• Experience with die capacitors, DTC caps and IPD caps.
• Experience with SOC power and integrated power modules.
• Experience with 3D/2.5D EMIR tools: Redhawk 3DIC or Voltus.
• 5+ years of experience with high-speed scopes and probing techniques.

Responsibilities

• Define, design and validate SI/PI aspects for AWS next‑gen ML ASICs.
• Collaborate across teams to solve challenging hardware problems at all design layers.
• Apply SI/PI techniques to packages, PCBs and interposers to ensure robust performance.
• Ensure power delivery systems meet datacenter reliability and efficiency.

Skills

Signal Integrity

Power Integrity

Hspice

Cadence

HFSS

Sigrity

Redhawk 3DIC

Voltus

High‑Speed Probing

Education

Master’s degree in Electrical Engineering (preferred)

Tools

Hspice

Cadence

HFSS

Sigrity

Microwave Studio

Redhawk 3DIC

Voltus

Job description

Annapurna Labs in Austin, TX is seeking a Signal Integrity / Power Integrity Engineer to help define, design, and validate next-generation AWS ML ASICs. You will work with hardware teams to ensure robust SI/PI across packages, PCBs, and interposers, delivering reliable performance for data center workloads.

The ideal candidate has 3+ years in SI/PI, hands-on with Hspice, Cadence, HFSS, and experience in high-speed signaling, power delivery, and advanced packaging. A Master’s degree is preferred.