Senior SI/PI Tech PM for High-Speed PCB & AI ASICs

Broadcom Inc.; Fort Collins (CO); On-site; USD 140,000 - 180,000; Full time

Benefits offered by this job

Discretionary annual bonus

Equity grants and annual equity awards

Medical, dental, and vision plans

401(k) with company match

Job summary

Broadcom Inc. is seeking an experienced SI/PI technical project manager to guide engineers in designing high‑speed, high‑power package and PCB solutions for AI, networking, HPC, and 5G platforms.

This on‑site role requires coordinating global teams across Fort Collins or San Jose, driving schedules, and delivering robust SI/PI methods. You will collaborate with internal teams and external vendors, develop MCMS and test flows, and ensure alignment of substrate, package, and PCB trade‑offs to

Qualifications

• Experience managing people and projects.
• Strong knowledge of signal integrity and power integrity.
• Ability to work across time zones with global teams.

Responsibilities

• Navigate and track 20+ concurrent pkg/PCB designs (scope, schedules, resources) from a technical execution standpoint.
• Organize team & customer activities to keep projects on track.
• Clearly and concisely communicate plans, status, next steps and risks on a regular basis.
• Create technical methodologies for signal and power integrity solutions.

Skills

Project management

Signal integrity

Power integrity

Communication

Cross-functional collaboration

Education

BSEE or similar field

MSEE or similar field

PhD EE or similar field

Tools

Automation code development

SI/PI EDA tools

Lab measurement equipment

Job description

Broadcom Inc. is seeking an experienced SI/PI technical project manager to guide engineers in designing high‑speed, high‑power package and PCB solutions for AI, networking, HPC, and 5G platforms.

This on‑site role requires coordinating global teams across Fort Collins or San Jose, driving schedules, and delivering robust SI/PI methods. You will collaborate with internal teams and external vendors, develop MCMS and test flows, and ensure alignment of substrate, package, and PCB trade‑offs to